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amdgpu: improve the amdgpu_cs_query_fence_status interface 

make amdgpu_cs_query_fence reusable to support multi-fence query

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
main
Jammy Zhou 2015-07-09 13:51:13 +08:00 committed by Alex Deucher
parent 12802da74f
commit f91b56dc8c
5 changed files with 27 additions and 22 deletions
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11
amdgpu/amdgpu.h
View File

@ -369,9 +369,6 @@ struct amdgpu_cs_query_fence {
/** In which context IB was sent to execution */
amdgpu_context_handle context;
/** Timeout in nanoseconds. */
uint64_t timeout_ns;
/** To which HW IP type the fence belongs */
unsigned ip_type;
@ -381,9 +378,6 @@ struct amdgpu_cs_query_fence {
/** Ring index of the HW IP */
uint32_t ring;
/** Flags */
uint64_t flags;
/** Specify fence for which we need to check submission status.*/
uint64_t fence;
};
@ -908,8 +902,9 @@ int amdgpu_cs_submit(amdgpu_context_handle context,
/**
* Query status of Command Buffer Submission
*
* \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
* \param fence - \c [in] Structure describing fence to query
* \param timeout_ns - \c [in] Timeout value to wait
* \param flags - \c [in] Flags for the query
* \param expired - \c [out] If fence expired or not.\n
* 0 – if fence is not expired\n
* !0 - otherwise
@ -925,6 +920,8 @@ int amdgpu_cs_submit(amdgpu_context_handle context,
* \sa amdgpu_cs_submit()
*/
int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
uint64_t timeout_ns,
uint64_t flags,
uint32_t *expired);
/*

8
amdgpu/amdgpu_cs.c
View File

@ -380,6 +380,8 @@ static int amdgpu_ioctl_wait_cs(amdgpu_context_handle context,
}
int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
uint64_t timeout_ns,
uint64_t flags,
uint32_t *expired)
{
amdgpu_context_handle context;
@ -430,7 +432,7 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
}
/* Checking the user fence is enough. */
if (fence->timeout_ns == 0) {
if (timeout_ns == 0) {
pthread_mutex_unlock(&context->sequence_mutex);
return 0;
}
@ -439,8 +441,8 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_query_fence *fence,
pthread_mutex_unlock(&context->sequence_mutex);
r = amdgpu_ioctl_wait_cs(context, ip_type, ip_instance, ring,
fence->fence, fence->timeout_ns,
fence->flags, &busy);
fence->fence, timeout_ns,
flags, &busy);
if (!r && !busy) {
*expired = true;
pthread_mutex_lock(&context->sequence_mutex);

20
tests/amdgpu/basic_tests.c
View File

@ -215,10 +215,11 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_GFX;
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_free(ib_result_handle);
@ -289,10 +290,11 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_GFX;
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_free(ib_result_handle);
@ -362,11 +364,12 @@ static void amdgpu_command_submission_compute(void)
CU_ASSERT_EQUAL(r, 0);
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = AMDGPU_HW_IP_COMPUTE;
fence_status.ring = instance;
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_bo_list_destroy(bo_list);
@ -446,10 +449,11 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle,
fence_status.ip_type = AMDGPU_HW_IP_DMA;
fence_status.ring = ibs_request->ring;
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
/* wait for IB accomplished */
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);

5
tests/amdgpu/cs_tests.c
View File

@ -140,10 +140,11 @@ static int submit(unsigned ndw, unsigned ip)
return r;
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = ip;
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
if (r)
return r;

5
tests/amdgpu/vce_tests.c
View File

@ -165,10 +165,11 @@ static int submit(unsigned ndw, unsigned ip)
resources[num_resources-1] = ib_handle;
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = ip;
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
if (r)
return r;