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amdgpu: add AMDGPU_VA_RANGE_HIGH 

Return high addresses if requested and available.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
main
Christian König 2018-02-26 14:11:52 +01:00
parent cd8a80493b
commit ff0da7b323
4 changed files with 24 additions and 8 deletions
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1
amdgpu/amdgpu.h
View File

@ -1162,6 +1162,7 @@ int amdgpu_read_mm_registers(amdgpu_device_handle dev, unsigned dword_offset,
* Flag to request VA address range in the 32bit address space
*/
#define AMDGPU_VA_RANGE_32_BIT 0x1
#define AMDGPU_VA_RANGE_HIGH 0x2
/**
* Allocate virtual address range

6
amdgpu/amdgpu_device.c
View File

@ -268,7 +268,6 @@ int amdgpu_device_initialize(int fd,
max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL);
amdgpu_vamgr_init(&dev->vamgr_32, start, max,
dev->dev_info.virtual_address_alignment);
dev->address32_hi = start >> 32;
start = max;
max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
@ -323,7 +322,10 @@ int amdgpu_query_sw_info(amdgpu_device_handle dev, enum amdgpu_sw_info info,
switch (info) {
case amdgpu_sw_info_address32_hi:
*val32 = dev->address32_hi;
if (dev->vamgr_high_32.va_max)
*val32 = dev->vamgr_high_32.va_max >> 32;
else
*val32 = dev->vamgr_32.va_max >> 32;
return 0;
}
return -EINVAL;

1
amdgpu/amdgpu_internal.h
View File

@ -73,7 +73,6 @@ struct amdgpu_device {
int flink_fd;
unsigned major_version;
unsigned minor_version;
uint32_t address32_hi;
char *marketing_name;
/** List of buffer handles. Protected by bo_table_mutex. */

24
amdgpu/amdgpu_vamgr.c
View File

@ -201,10 +201,21 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
{
struct amdgpu_bo_va_mgr *vamgr;
if (flags & AMDGPU_VA_RANGE_32_BIT)
vamgr = &dev->vamgr_32;
else
vamgr = &dev->vamgr;
/* Clear the flag when the high VA manager is not initialized */
if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
flags &= ~AMDGPU_VA_RANGE_HIGH;
if (flags & AMDGPU_VA_RANGE_HIGH) {
if (flags & AMDGPU_VA_RANGE_32_BIT)
vamgr = &dev->vamgr_high_32;
else
vamgr = &dev->vamgr_high;
} else {
if (flags & AMDGPU_VA_RANGE_32_BIT)
vamgr = &dev->vamgr_32;
else
vamgr = &dev->vamgr;
}
va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
size = ALIGN(size, vamgr->va_alignment);
@ -215,7 +226,10 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
if (!(flags & AMDGPU_VA_RANGE_32_BIT) &&
(*va_base_allocated == AMDGPU_INVALID_VA_ADDRESS)) {
/* fallback to 32bit address */
vamgr = &dev->vamgr_32;
if (flags & AMDGPU_VA_RANGE_HIGH)
vamgr = &dev->vamgr_high_32;
else
vamgr = &dev->vamgr_32;
*va_base_allocated = amdgpu_vamgr_find_va(vamgr, size,
va_base_alignment, va_base_required);
}