Commit Graph

3036 Commits (0b69c1d1d6a09d55d3367296dfdf23269f2721ea)

Author SHA1 Message Date
Ben Skeggs 24b71c318a nouveau: prototype PFIFO/PGRAPH engtab API 2007-06-24 18:54:51 +10:00
Ben Skeggs 5c7c07fd49 nouveau: rename engtab functions 2007-06-24 18:54:36 +10:00
Michel Dänzer 068ffc1e1b radeon: Acknowledge all interrupts we're interested in.
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
Oliver McFadden 40f6a696cb r300: Synchronized the register defines file; documentation changes. 2007-06-21 14:35:11 +00:00
Oliver McFadden 213732af43 r300: Allow writes to R300_VAP_PVS_WAITIDLE. 2007-06-21 14:32:58 +00:00
Oliver McFadden 215787e429 r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1. 2007-06-18 08:42:46 +00:00
Oliver McFadden 8038e7b60f r300: Synchronized the register defines file again. 2007-06-18 08:36:50 +00:00
David Woodhouse 638ebbab54 fix radeon setparam on 32/64 systems, harder.
Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a
    compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was
    to handle the fact that on i386, alignof(uint64_t)==4.

    Unfortunately, this handler was installed for _all_ 64-bit
    architectures, instead of only x86_64 and ia64.  And thus it breaks
    32-bit compatibility on every other arch, where 64-bit integers are
    aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode.

    Arnd has a cunning plan to use 'compat_u64' with appropriate alignment
    attributes according to the 32-bit ABI, but for now let's just make the
    compat_radeon_cp_setparam routine entirely disappear on 64-bit machines
    whose 32-bit compat support isn't for i386.  It would be a no-op with
    compat_u64 anyway.

    Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-18 12:46:00 +10:00
Michel Dänzer 3d5d41fa98 i915: Fix handling of breadcrumb counter wraparounds. 2007-06-15 17:13:11 +02:00
Thomas Hellstrom 84bea38353 Fix i915 sequence mask. 2007-06-15 10:35:52 +02:00
Thomas Hellstrom 3ee31a1f35 Indentation fixes. 2007-06-15 10:31:32 +02:00
Thomas Hellstrom d34b2c7b9e Fix refcounting / lock race.
Reported by Steve Wilkins / Michel Dnzer.
2007-06-15 10:26:51 +02:00
Thomas Hellstrom e1b8eabeee Locking fixes and instrumentation. 2007-06-15 10:26:51 +02:00
Thomas Hellstrom 2407ce57de Fix drmMMUnlock / drmMMLock return values. 2007-06-13 15:59:28 +02:00
Thomas Hellstrom 62082ab3e6 Make sure we read fence->signaled while spinlocked. 2007-06-13 15:38:59 +02:00
Thomas Hellstrom 5156f1c897 Fix fence object deref race. 2007-06-13 15:19:30 +02:00
Thomas Hellstrom f984b1b8d1 Fix some obvious bugs. 2007-06-12 12:30:33 +02:00
Thomas Hellstrom b6b5df24b9 Try to make buffer object / fence object ioctl args 64-bit safe.
Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
2007-06-12 12:21:38 +02:00
Dave Airlie 280083d4a2 use krh's idr mods to remove lists from idr code 2007-06-10 15:40:21 +10:00
Oliver McFadden 3181573073 r300: Added the CP maximum fetch size and ring rptr update variables. 2007-06-08 19:40:57 +00:00
Dave Airlie 7426da7538 oops must fix this properly at some point 2007-06-07 18:45:00 +10:00
Dave Airlie e22f428f5f drm: fix radeon setparam alignment issues on 32/64-bit 2007-06-07 18:41:18 +10:00
Dave Airlie abf35cbdcf radeon: PCIGART memory is Can't map aperture as well there is one
on the CPU.... with this my indirect buffers at least start to live..
(cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122)
2007-06-07 15:37:03 +10:00
Oliver McFadden 39625f9621 r300: Small correction to the previous commit. 2007-06-05 19:19:42 +00:00
Alex Deucher 9e0bd88c61 r300: Document more of the RADEON_RBBM_STATUS register. 2007-06-05 19:05:49 +00:00
Wang Zhenyu 109e2a10f2 Add support for the G33, Q33, and Q35 chipsets.
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory.  So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
Dave Airlie 03ce98aa28 set start to gart_vm_start at least 2007-06-05 18:23:24 +10:00
Dave Airlie 96705ce664 add wbinvd calls 2007-06-05 18:23:05 +10:00
Dave Airlie 5bd0ca125e remove include of linux ioctl32.h from drm drivers 2007-06-05 18:16:44 +10:00
Dave Airlie c9dbe0f2c2 invalidate gart tlb on PCIE after table change 2007-06-05 12:38:43 +10:00
Dave Airlie f6e8023e03 take the lock earlier in ttmtest 2007-06-05 12:26:18 +10:00
Dave Airlie 4294dcc050 complete PCIE backend for ttm
ttm test runs with it at least, needs to do more testing on it
2007-06-05 12:26:06 +10:00
Dave Airlie 234a906200 WIP cleanup 2007-06-05 10:47:42 +10:00
Dave Airlie 77b9d9d16b cleanup pcigart ttm for new backend layout 2007-06-05 10:35:41 +10:00
Dave Airlie 07345af838 Merge branch 'origin' into radeon-ttm
Conflicts:

	shared-core/radeon_drv.h
2007-06-05 10:09:11 +10:00
Maurice van der Pot 4327d7f314 nouveau: fix RAMHT wrapping 2007-06-04 10:49:30 +10:00
Dave Airlie a05d4fecd3 radeon: refine irq acking for vbl on crtc 2 2007-06-03 18:30:52 +10:00
root a4cddc6596 Revert "drm: add new drm_wait_on function to replace macro"
This reverts commit 6e860d08d0.

As I said not a good plan - this macro will have to stay for now,
trying to do the vbl code with the inline was a bit messy - may need specialised
drm wait on functions
2007-06-03 18:12:28 +10:00
root 8d95f4bd91 Revert "move i915 to new drm_wait_on function"
This reverts commit feb6803778.

This was a bad idea, the macro is actually a bit harder to convert
to a static for the other use cases
2007-06-03 18:11:44 +10:00
Dave Airlie 4e9d215bdf radeon: add support for vblank on crtc2
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
Dave Airlie 638c8087de drm: fixup initialisation of list heads and idr 2007-06-01 19:00:24 +10:00
David Airlie 704ca06389 WIP more code for radeon 2007-06-01 18:12:45 +10:00
Wang Zhenyu 5c394b309d i915: Add support for 945GME chip 2007-05-31 11:09:15 +01:00
Wang Zhenyu 3917f85c73 i915: Add support for 965GME/GLE chip. 2007-05-31 11:09:07 +01:00
Jung-uk Kim b0c8d885ce Update a bunch of FreeBSD port code.
Tested on r200/r300.  i915 updates still remain to be done.
2007-05-29 15:02:44 -07:00
Brian fdc293d40c reformatting, clean-ups 2007-05-29 14:56:17 -06:00
Brian ccd7b6e8dd Clean-ups and reformatting.
Use 4-space indentation consistently.
Replace occurances of:
	if (cond) code;
with:
	if (cond)
		code;
to facilitate putting breakpoints on code.
2007-05-29 14:54:00 -06:00
Dave Airlie 056c2f249a drm: move context handling code to use linux idr 2007-05-27 08:44:38 +10:00
Dave Airlie f64674743a drm: convert drawable handling to use Linux idr
This cleans this code up a lot and uses the generic Linux idr which is
designed for this.

Signed-off-by: Dave Airlie <airlied@linux.ie>
2007-05-27 07:26:52 +10:00
Thomas Gleixner 2bb7703698 drm: spinlock initializer cleanup 2007-05-26 05:20:59 +10:00