Commit Graph

1341 Commits (0c47151a571827905c34649208e22f8ec0175d62)

Author SHA1 Message Date
Stuart Bennett 0c47151a57 nouveau: wait for pgraph idle after loading or saving a context
the nvidia driver does this, and it stops the error message appearing on nv40
2008-08-08 16:25:05 +01:00
Dave Airlie 4585787bd1 Revert "i915: Move all of the irq install/uninstall to load time."
This reverts commit 965a72202b.

Please re-do over properly
2008-08-01 07:43:58 +10:00
Dave Airlie 95c02743c9 i915: more version checks 2008-07-30 16:52:13 +10:00
Dave Airlie 02b09d271c i915: add version checks for opregion on old kernels 2008-07-30 16:26:59 +10:00
Nicolai Haehnle 90b90c65dc r300: Fix cliprect emit
This makes our handling of cliprects sane. drm_clip_rect always has exclusive
bottom-right corners, but the hardware expects inclusive bottom-right corners,
so we adjust this here.

This complements Michel Daenzer's commit 57aea290e1e0a26d1e74df6cff777eb9f038f1f8
to Mesa. See also http://bugs.freedesktop.org/show_bug.cgi?id=16123 .
2008-07-29 19:59:08 +02:00
Stuart Bennett 6b903f5edf nouveau: fix nv04 fifo context save to save reg contents, not reg offset
clearly the function had never been used :)
2008-07-29 02:32:13 +01:00
Stuart Bennett 591f6bcba3 nouveau: fix bad rename from 5a072f32c8 2008-07-29 02:26:34 +01:00
Nicolai Haehnle c3d463840c r300_cmdbuf: Always emit INDX_BUFFER immediately after DRAW_INDEX
DRAW_INDEX writes a vertex count to VAP_VF_CNTL. Docs say that behaviour
is undefined (i.e. lockups happen) when this write is not followed by the
right number of vertex indices.

Thus we used to do the wrong thing when drawing across many cliprects was
necessary, because we emitted a sequence
 DRAW_INDEX, DRAW_INDEX, INDX_BUFFER, INDX_BUFFER
instead of
 DRAW_INDEX, INDX_BUFFER, DRAW_INDEX, INDX_BUFFER
The latter is what we're doing now and which ought to be correct.
2008-07-26 16:40:51 +02:00
Robert Noland 965a72202b i915: Move all of the irq install/uninstall to load time.
This resolves a panic on FreeBSD which was caused by trying
to re-initialize the swap lock.  It's just much easier to
initialize all of the locks at load time.  It should also
ensure that the vblank structures are available earlier.
2008-07-23 19:55:06 -04:00
Dave Airlie 589f968173 radeon: fix typo with a better typo 2008-07-22 18:47:27 +10:00
Dave Airlie c669489813 radeon: fix type DST vs Z cache flush 2008-07-22 18:10:03 +10:00
Michel Dänzer b5cddbcc15 Remove accidental leftover tests.
Thanks to Nicolai Haehnle for pointing this out on IRC.
2008-07-21 13:43:12 +02:00
Michel Dänzer e4feaf506d radeon: Post-vblank-rework-rework cleanups.
Thanks to the reworked vblank-rework, we can just use the hardware frame
counter directly, and make the RADEON_PARAM_VBLANK_CRTC getparam just return
what was set by the corresponding setparam.
2008-07-21 08:16:59 +02:00
Jesse Barnes 04893aa99a i915: convert to using drm_vblank_get/put around vblank counter usage
All interrupt off vblank count updates are done in drm_vblank_get/put
now, so convert users of the vblank counter over to that interface.
2008-07-19 13:21:38 -04:00
Dave Airlie 7cfdba2b30 radeon: remove microcode version 2008-07-18 14:36:47 +10:00
Dave Airlie ed7e170915 drm/radeon: fixup 0 vs NULL 2008-07-18 14:32:46 +10:00
Jesse Barnes a9427cf318 i915: remove old broken vblank code
Remove the unused (and broken) "in vblank" code now that the core has
been fixed to use a counter while interrupts are enabled.  Also make the
vblank pipe get/set ioctls into dumb stub functions, since with the new
code we can no longer let userspace control whether vblank interrupts
are enabled, or the core code will misbehave.
2008-07-17 13:55:24 -04:00
Hong Liu dfd441cf96 This is a modified version of Hong's patch from last month, with a few
modifications to make it work correctly on my test hardware (altered the
backlight write function, made it enable the legacy backlight controller
interrupts on mobile hardware, sorted the interrupt function so we don't
get an excessive number of vblank interrupts). This lets the backlight
keys on my T61 work properly, though there's a 750msec or so delay
between the request and the brightness actually changing - this sounds
awfully like the hardware spinning waiting for a status flag to become
ready, but as far as I can tell they're all set correctly. If anyone can
figure out what's wrong here, it'd be nice to know.

Some of the functions are still stubs and just tell the hardware that
the request was successful. These can be filled in as kernel modesetting
gets integrated. I think it's worth getting this in anyway, since it's
required for backlight control to work properly on some new platforms.

Signed-off-by: Matthew Garrett <mjg@redhat.com>
2008-07-15 10:14:17 -07:00
Dave Airlie abdd523c75 drm: add fix for PAT on radeon with 2.6.26 2008-07-15 16:18:22 +10:00
Ben Skeggs c7ed2c6791 nouveau: interface changes for nv5x 3d 2008-07-08 12:35:50 +10:00
Zhenyu Wang 401f77a2ef i915: official name for GM45 chipset
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-07-03 00:49:51 +08:00
Jesse Barnes 301d984ea8 i915: only use tiled blits on 965+
When scheduled swaps occur, we need to blit between front & back buffers.  I
the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit,
only on 965 chips, since it will cause corruption on pre-965 (e.g. 945).

Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01 16:10:01 -07:00
Ben Skeggs 5d27fd94af nv50: when destroying a channel make sure it's not still current on PFIFO
We won't get a PFIFO context switch when the same channel ID is recreated if
the hw still thinks the channel is already active, which causes fun issues.

Should allow X to be stopped and started without tearing down the entire
card state in lastclose().
2008-06-25 16:49:48 +10:00
Jesse Barnes 893cd01a1d i915: register definition & header file cleanup
It would be nice if one day the DRM driver was the canonical source for
register definitions and core macros.  To that end, this patch cleans things up
quite a bit, removing redundant definitions (some with different names
referring to the same register) and generally tidying up the header file.
2008-06-24 12:51:29 -07:00
Ben Skeggs 01e8f0ea42 nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size.. 2008-06-23 02:42:15 +10:00
Ben Skeggs 89cf2ee2e5 nv50: use same dma object for fb/tt access
We depend on the VM fully now for memory protection, separate DMA objects
for VRAM and GART are unneccesary.  However, until the next interface break
(soon) a client can't depend on the objects being the same and must still
call NV_OBJ_SET_DMA_* methods appropriately.
2008-06-23 01:24:11 +10:00
Ben Skeggs b9ed0f9950 nouveau: allocate drm-use vram buffers from end of vram.
This avoids seeing garbage from engine setup etc before X gets around
to pointing the CRTCs at a new scanout buffer.  Not actually a noticable
problem before G80 as PRAMIN is forced to the end of VRAM by the hardware
already.
2008-06-23 01:00:42 +10:00
Alex Deucher 207f701e1a RADEON: 0x1002 0x5657 is actually an RV410
See bug 14289
2008-06-21 10:46:55 -04:00
Dave Airlie 9d79944a93 r300: fix warning 2008-06-20 15:35:16 +10:00
Zhenyu Wang 00f549bd5f i915: Add support for Intel 4 series chipsets
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-06-18 14:19:38 +08:00
Jerome Glisse 59112c9e52 radeon: *really* fix screen corruption thanks to Lukasz Krotowski 2008-06-15 20:18:29 +02:00
Jerome Glisse 6f8cc95703 radeon: actualy try to fix the corruption 2008-06-15 19:31:02 +02:00
Jerome Glisse 9dd58d6568 radeon: fix screen corruption introduced by last patch 2008-06-15 18:49:47 +02:00
Jerome Glisse 00b4063906 radeon: bump driver date to know if lockup fix is in 2008-06-13 10:02:41 +02:00
Jerome Glisse 1aafbb83d9 radeon: r345xx fixe hard lockup
This patch should fixe hard lockup and convert them in
softlockup (ie you can ssh the box but the gpu is busted
and we are waiting in loop for it to come back to reason).
2008-06-13 09:54:05 +02:00
Alex Deucher a07c82183a RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
2008-06-11 18:25:47 -04:00
Ian Romanick b535567ee9 xgixp: Remove dependency on TTM fences 2008-06-10 22:18:14 -07:00
Alex Deucher 4b8aecbde8 RADEON: Add untested support for RS400 chips
GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
2008-06-09 16:58:06 -04:00
Alex Deucher f6982b54c9 RADEON: switch IGP gart to use radeon_write_agp_base() 2008-06-09 16:28:35 -04:00
Robert Noland 63eb58040d Fix typo in i915_suspend
Reported by vehemens
2008-06-08 23:46:14 -04:00
Robert Noland 116870a908 I915 suspend/resume for FreeBSD 2008-06-08 13:56:14 -04:00
Dave Airlie d43f3cb097 r300/r500: add hier-z regs 2008-06-09 05:32:41 +10:00
Dennis Kasprzyk 6905c7a29d radeon: Restore software interrupt on resume.
Fixes performance drop after suspend/resume on some systems.
2008-06-05 18:23:37 +02:00
Dave Airlie d5ae19ebcf drm: sg alloc should write back the handle to userspace 2008-06-03 12:44:06 +10:00
Alex Deucher a12cbf8aa5 RADEON: fix typo in last commit 2008-05-30 18:20:01 -04:00
Dave Airlie 6e8a2cff66 r500: attempt to make AGP work by programming agp base in the MC correctly 2008-05-30 20:27:31 +10:00
Dave Airlie 5b86823fa3 radeon: split microcode out into a separate header file. 2008-05-28 11:12:57 +10:00
Dave Airlie 0c8a8db1b6 i915: fix BSD bh, DRI2 not uses anywhere else 2008-05-28 10:28:13 +10:00
Dave Airlie c06096d34f radeon: bump release date/version for r500 3D support 2008-05-28 10:02:20 +10:00
Alex Deucher 59c953245c RADEON: add get_param for number of GB pipes 2008-05-27 18:34:33 -04:00