Commit Graph

9 Commits (267e0645272720344eb7556a948e72112edbe2ec)

Author SHA1 Message Date
Thomas Hellstrom 4f8fa60286 Reworked PCI MMIO command buffer parser, and imported code from the Mesa
driver. It can now handle the 3D OpenGL commands from the Mesa
    unichrome driver.
Added vsync frequency detection support. This will be used in the future
    for XvMC and better frame timing.
Bumped minor version number and driver date.
2004-11-27 22:55:31 +00:00
Dave Airlie fec94a8274 Lindent the via stuff so I can include it in kernel 2004-10-09 11:12:24 +00:00
Thomas Hellstrom d24194e904 Changed unsigned to uint32_t in some ioctl parameters. Introduced first
rudimentary command verifier for dma buffers. Changed the decoder futex
    ioctl parameters. Bumped the via major version number.
2004-10-08 21:11:02 +00:00
Jon Smirl 9e421181dd Fix the shared directory I accidentally stomped on 2004-09-27 20:14:31 +00:00
Jon Smirl fa6b1d129e First check in for DRM that splits core from personality modules 2004-09-27 19:51:38 +00:00
Thomas Hellstrom b0c73b7fcb Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor
version number.
2004-09-07 16:48:44 +00:00
Erdi Chen 25e319c1ef This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver:
DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
    buffer. The second ioctl copies a command buffer from user space memory
    to the ring buffer. The third ioctl waits for engine idle until it
    returns.
The motivation for this patch is to avoid the wait for engine idle call
    before each buffer flush in the current DRI driver. With this patch,
    the DRI driver can continue to flush its buffer as long as there is
    free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
    buffer copying is necessary to support multiple DRI clients rendering
    simultaneously. Otherwise, more CPU time will be spent in the busy loop
    waiting for engine idle between DRI context switch. Even in the single
    client case, the tradeoff is reasonable in comparision to the kernel
    call to check for free buffer space for the client to render directly
    to the ring buffer.
2004-08-24 01:44:37 +00:00
Thomas Hellstrom 6f6d2a553a 1. Added a PCI ID.
2. Big change to the XvMC part of the SAREA. OpenGL clients will not suffer
    from this, and via XvMC is still alpha. Needed to make future additions
    to XvMC (More decoders and overlays) possible.
3. Bumped version number to 1.3.0.
2004-04-12 10:18:18 +00:00
Thomas Hellstrom 6cd8831f7a Merged via-1-2-0 2004-03-23 21:08:48 +00:00