Commit Graph

139 Commits (329e0862255e8ad27e2aa4e3755421a18ea1acc5)

Author SHA1 Message Date
Eric Anholt 461bfa3da6 Merge commit 'origin/master' into drm-gem
Conflicts:

	linux-core/Makefile.kernel
	shared-core/i915_drv.h
	shared-core/nouveau_state.c
2008-05-30 14:42:08 -07:00
Eric Anholt e10502002f [intel-gem] Replace idlelock usage with real lock acquisition. 2008-05-27 18:03:18 -07:00
Dave Airlie 0c8a8db1b6 i915: fix BSD bh, DRI2 not uses anywhere else 2008-05-28 10:28:13 +10:00
Jie Luo e45f95a03b [i915] Fix typo in (unused) START_ADDR definition. 2008-05-27 14:55:01 -07:00
Robert Noland 8cd045079e [FreeBSD] Add vblank-rework support and get drivers building.
The i915 driver now works again.
2008-05-27 14:25:20 -07:00
Keith Packard d434b64f6a [i915] leave interrupts masked off when not in use.
The interrupt enable register cannot be used to temporarily disable
interrupts, instead use the interrupt mask register.

Note that this change means that a pile of buffers will be left stuck on the
chip as the final interrupts will not be recognized to come and drain things.
2008-05-26 03:25:16 -07:00
Keith Packard 7cf3fd29fe [intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25 20:45:20 -07:00
Keith Packard a51c3a76ff [intel] Add debug code to verify the cached ring tail pointer.
Recording the tail pointer in a local variable improves performance, but if
someone messes up and fails to reload at the right time, the driver will
write commands to the wrong part of the ring and scramble execution badly.

This change (available by setting I915_RING_VALIDATE to 1) checks to make
sure the cached tail pointer matches the hardware tail pointer at each ring
buffer addition, calling BUG_ON when that's not true.
2008-05-22 22:00:21 -07:00
Eric Anholt 5e662f90d1 [gem] Release GEM buffers from work task scheduled from IRQ.
There are now 3 lists.  Active is buffers currently in the ringbuffer.
Flushing is not in the ringbuffer, but needs a flush before unbinding.
Inactive is as before.  This prevents object_free → unbind →
wait_rendering → object_reference and a kernel oops about weird refcounting.

This also avoids an synchronous extra flush and wait when freeing a buffer
which had a write_domain set (such as a temporary rendered to and then from
using the 2d engine).  It will sit around on the flushing list until the
appropriate flush gets emitted, or we need the GTT space for another
operation.
2008-05-22 22:00:21 -07:00
Eric Anholt d6f7968577 [gem] Replace ring throttling hack with actual time measurement. 2008-05-21 16:40:14 -07:00
Eric Anholt af8e087157 [gem] Use a separate sequence number field from classic/ttm
This lets us get some qualities we desire, such as using the full 32-bit
range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active
sequence numbers to request structs, which will be used soon for throttling
and interrupt-driven list cleanup.
2008-05-20 14:16:26 -07:00
Eric Anholt ab36a6f983 [gem] Rename sequence numbers from "cookie" to "seqno" 2008-05-20 10:53:10 -07:00
Eric Anholt 6c3ac484b0 [gem] Clean up active/inactive list handling using helper functions.
Additionally, a boolean active field is added to indicate which list an
object is on, rather than smashing last_rendering_cookie to 0 to show
inactive.  This will help with flush-reduction later on, and makes the code
clearer.
2008-05-20 10:52:39 -07:00
Eric Anholt 7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Eric Anholt 3ab152da66 [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). 2008-05-15 11:59:58 -07:00
Keith Packard ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Eric Anholt c5c59eab80 GEM: Separate the LRU into execution list and LRU list.
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Keith Packard 9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Keith Packard 6a6c37af9e [intel-GEM] ref count objects in gtt-lru.
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
Eric Anholt d2373b2a34 GEM: Use irq-based fencing rather than syncing and evicting every exec. 2008-05-06 13:28:26 -07:00
Keith Packard 91cba3ae17 Dump last batch buffer when hardware lockup is detected. 2008-05-05 22:10:02 -07:00
Keith Packard b6f173c430 Add i915_dispatch_gem_execbuffer (broken).
This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
Keith Packard 49e8e3372a Remove drm_driver argument to functions taking drm_gem_object.
Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
Eric Anholt 793549116e Add pin/unpin object ioctls for gem. 2008-05-01 15:40:02 -07:00
Eric Anholt 5af87acbc2 checkpoint: gtt binding written. 2008-05-01 14:20:44 -07:00
Eric Anholt 2140e102f9 checkpoint: rename to GEM and a few more i915 bits. 2008-05-01 11:39:20 -07:00
Eric Anholt 1a84067950 Hacking towards hooking up execbuffer. 2008-04-30 16:03:15 -07:00
Jesse Barnes cb33133ef3 i915: fix off by one in VGA save/restore of AR & CR regs
Turns out it's important to save/restore AR14 in particular.
2008-04-29 12:39:38 -07:00
Dave Airlie ce8c842518 i915: gfx hw and i945gme fixes from upstream
From Jesse and Zhenyu originally.
2008-04-22 16:08:17 +10:00
Keith Packard f0e38f5217 [I915] Handle tiled buffers in vblank tasklet
The vblank tasklet update code must build 2D blt commands with the
appropriate tiled flags.
2008-04-20 16:10:05 -07:00
Keith Packard b986d7d2c9 Save and restore dsparb and d_state regs 2008-04-11 20:31:07 -07:00
Thomas Hellstrom 88bd1e4a35 Merge branch 'intel-post-reloc'
Conflicts:

	linux-core/drm_compat.c
	linux-core/drm_compat.h
	linux-core/drm_ttm.c
	shared-core/i915_dma.c

Bump driver minor to 13 due to introduction of new
relocation type.
2008-03-12 11:34:29 +01:00
Thomas Hellstrom 8a18d123f5 Avoid large kmallocs. 2008-03-12 09:49:27 +01:00
Keith Packard 2848f04861 Switch from PIPE_VBLANK to PIPE_EVENT interrupts.
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-03-08 00:04:30 -08:00
Thomas Hellstrom 2305100c0f More post-ioctl work. 2008-02-29 13:25:55 +01:00
Keith Packard 5d8c754bc2 [915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
Kristian Høgsberg 373dbcf8b2 i915: Add a dri2 init path that gets the lock from the dri2 sarea. 2008-02-13 13:34:02 -05:00
Jesse Barnes 6f19473191 Fix saveGR array size
Make sure we have enough room for all the GR registers or we'll end up
clobbering the AR index register (which should actually be harmless
unless the BIOS is making an assumption about it).
2008-02-07 11:21:09 -08:00
Jesse Barnes 8b6c96dedd i915: save/restore interrupt state
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time.  So save/restore them properly.
2008-02-07 10:48:08 -08:00
Thomas Hellstrom 76748efae2 i915: Re-report breadcrumbs on poll to the fence manager,
since a breadcrumb may actually turn up before a corresponding fence object
has been placed on the fence ring.
2008-02-05 10:36:49 +01:00
Thomas Hellstrom f1edb7ad91 Simplify the fencing code and differentiate between flushes and
waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
Jesse Barnes c7ee6cc269 Remove broken 'in vblank' accounting
We need to return an accurate vblank count to the callers of
->get_vblank_counter, and in the Intel case the actual frame count
register isn't udpated until the next active line is displayed, so we
need to return one more than the frame count register if we're currently
in a vblank period.

However, none of the various ways of doing this is working yet, so
disable the logic for now.  This may result in a few missed events, but
should fix the hangs some people have seen due to the current code
tripping the wraparound logic in drm_update_vblank_count.
2008-01-24 08:57:04 -08:00
Jesse Barnes cb91784371 Fix IS_I915G macro
One to many parantheses...
2008-01-23 08:38:01 -08:00
Dave Airlie 2f19fe4498 drm/i915: add support for E7221 2008-01-23 16:44:51 +10:00
Jesse Barnes 531f25cfe9 Correct vblank count value
The frame count registers don't increment until the start of the next
frame, so make sure we return an incremented count if called during the
actual vblank period.
2008-01-22 15:16:01 -08:00
Jesse Barnes 0cd4cbc9a6 Merge branch 'master' into vblank-rework, including mach64 support
Conflicts:

	linux-core/drmP.h
	linux-core/drm_drv.c
	shared-core/i915_drv.h
	shared-core/i915_irq.c
	shared-core/mga_irq.c
	shared-core/radeon_irq.c
	shared-core/via_irq.c

Mostly trivial conflicts.

mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
Zhenyu Wang ac6b3780c8 i915: Add chipset id for Intel Integrated Graphics Device
This adds new chipset id in drm.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
Márton Németh 9ab620d661 drm: cleanup DRM_DEBUG() parameters
As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.

airlied:- I cleaned up a few that this patch missed also
2008-01-03 16:56:04 +10:00
Keith Packard d1187641d6 Rename inappropriately named 'mask' fields to 'proposed_flags' instead.
Flags pending validation were stored in a misleadingly named field, 'mask'.
As 'mask' is already used to indicate pieces of a flags field which are
changing, it seems better to use a name reflecting the actual purpose of
this field. I chose 'proposed_flags' as they may not actually end up in
'flags', and in an case will be modified when they are moved over.

This affects the API, but not ABI of the user-mode interface.
2007-12-21 12:16:29 -08:00
Keith Packard 9ee511d786 Bump driver minor for relocation optimzations 2007-12-11 20:23:00 -08:00