root
0da66c27fa
nouveau: fifo and graphics engine suspend and resume for nv04-nv4x
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Corresponding DDX patch at http://people.freedesktop.org/~stuart/nv0x-nv4x_suspend/
2008-08-19 02:01:14 +01:00
Stuart Bennett
a0781e7622
nouveau: make nv34 work every time, not just every 2nd time
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And make nv30_graph_init a bit more like mmio-traces
2008-02-04 16:38:31 +00:00
Stuart Bennett
381724a35b
[PATCH] nouveau: Fix nv20/30 context loading
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Don't set the context as valid until it has been loaded
2008-01-04 05:07:35 +01:00
Patrice Mandin
449a3b19ff
Revert "nouveau: nv30: missing ramin init, does it brake other hw?"
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This reverts commit 46235ea459
.
2007-12-15 10:25:13 +01:00
Stephane Marchesin
9b2a95bc6c
nouveau: revert the nv34 context size change, it was not the culprit after all.
2007-11-15 18:01:26 +01:00
Patrice Mandin
46235ea459
nouveau: nv30: missing ramin init, does it brake other hw?
2007-11-14 23:32:43 +01:00
Stephane Marchesin
448ccf13ba
nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards.
2007-11-14 02:59:00 +01:00
Dave Airlie
7f6bf84c23
drm: remove lots of spurious whitespace.
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Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Pekka Paalanen
d81bc78a04
nouveau: more nv20_graph_init.
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This patch is originally from malc0_, but since it used some NV40_*
regs, I edited them into hex values with a comment.
This seems to correspond quite well with my own mmio-trace,
for the parts I cared to check.
2007-11-04 14:10:00 +02:00
Stephane Marchesin
0cebcd43dd
Nouveau: fold some loops.
2007-10-30 16:54:57 +01:00
Stephane Marchesin
b9d8ddd3ca
nouveau: flip the CHECK_STATE bit off on nv30. This lets you do 8-bit surface destination.
2007-10-26 15:12:04 +02:00
Pekka Paalanen
3ab7627651
nouveau: Fix a typo in nv25_graph_context_init
2007-10-12 23:55:59 +03:00
Stuart Bennett
50deb31e9f
nouveau: Fix typos in nv20_graph_context_init
2007-10-12 23:49:51 +03:00
Stephane Marchesin
7fbd10d933
nouveau: nv2a drm context switch support.
2007-10-04 03:44:23 +02:00
Pekka Paalanen
a72eb27fbc
nouveau: nv20 graph_create_context difference
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nv20 writes the chan->id to a different place than nv28.
This still does not make nv20 run nv10_demo.
2007-10-02 22:18:47 +03:00
Pekka Paalanen
afc57ef1df
nouveau: fix nv25_graph_context_init
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It was writing 4x the data in a loop.
2007-10-02 22:18:47 +03:00
Stuart Bennett
ffa3173ec4
nouveau: nv20 graph context init
2007-10-02 22:18:46 +03:00
Stephane Marchesin
e1600646a9
nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but causes nv30 issues.
2007-10-01 03:28:10 +02:00
Matthieu Castet
75e8f4b5cf
nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLE
2007-09-30 23:19:39 +02:00
Matthieu Castet
9cd6ece307
nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idle
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Also clean PGRAPH_CHANNEL macros
2007-09-30 23:09:30 +02:00
Pekka Paalanen
aa135ba8e8
nouveau: rename nv30_graph.c to nv20_graph.c
2007-09-30 22:16:01 +03:00
Pekka Paalanen
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
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All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
8ad605a264
nouveau: let nv20 hardware do ctx switching automatically.
2007-09-30 22:16:01 +03:00
Pekka Paalanen
dc592c8b7b
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
2007-09-30 22:16:01 +03:00
Ben Skeggs
4ad487190d
nouveau: enable/disable engine-specific interrupts in _init()/_takedown()
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All interrupts are still masked by PMC until init is finished.
2007-08-08 10:49:05 +10:00
Ben Skeggs
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
Eric Anholt
e39286eb5e
Remove DRM_ERR OS macro.
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This was used to make all ioctl handlers return -errno on linux and errno on
*BSD. Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
2007-07-20 12:53:52 -07:00
Ben Skeggs
875dd1e538
nouveau: Destroy PGRAPH context table on PGRAPH takedown
2007-07-17 14:06:05 +10:00
Ben Skeggs
0029713451
nouveau: nuke internal typedefs, and drm_device_t use.
2007-07-13 15:09:31 +10:00
Ben Skeggs
c806bba466
nouveau/nv50: Initial channel/object support
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
2007-07-09 16:16:44 +10:00
Ben Skeggs
163f852612
nouveau: rewrite gpu object code
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Allows multiple references to a single object, needed to support PCI(E)GART
scatter-gather DMA objects which would quickly fill PRAMIN if each channel
had its own.
Handle per-channel private instmem areas. This is needed to support NV50,
but might be something we want to do on earlier chipsets at some point?
Everything that touches PRAMIN is a GPU object.
2007-07-09 16:16:44 +10:00
Ben Skeggs
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
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NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
Matthieu Castet
cbbdbd5e65
nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+
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http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file.
Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e , NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-04-01 14:31:41 +02:00
Ben Skeggs
674cefd4fe
nouveau: move card initialisation into the drm
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The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-26 20:59:37 +10:00
Stephane Marchesin
5a072f32c8
nouveau: rename registers to their proper names.
2007-02-03 04:57:06 +01:00
Matthieu Castet
fdbc34fab0
nouveau: opps nv20 ctx ramin size was wrong
2007-01-14 20:04:20 +01:00
Matthieu Castet
06cd155595
nouveau: opps restored the wrong channel
2007-01-13 23:30:43 +01:00
Matthieu Castet
f04347f371
nouveau: nv20 graph ctx switch.
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Untested...
2007-01-13 23:19:41 +01:00