Commit Graph

55 Commits (487c42bd42d93304278abce03b36c935bdc83284)

Author SHA1 Message Date
Eric Anholt a0474be4e7 intel-gem: Add two new ioctls for managing tiling on objects.
Various chips have exciting interactions between the CPU and the GPU's
different ways of accessing interleaved memory, so we need some kernel
assistance in determining how it works.

Only fully tested on GM965 so far.
2008-07-11 18:58:02 -07:00
Keith Packard 52e5d24fae [intel-gem] Add DRM_IOCTL_I915_GEM_SW_FINISH to flag CPU writes
When a software fallback has completed, usermode must notify the kernel so
that any scanout buffers can be synchronized. This ioctl should be called
whenever a fallback completes to flush CPU and chipset caches.
2008-06-20 00:21:57 -07:00
Eric Anholt 846d792ac1 [gem] Another round of cleanups from checkpatch.pl 2008-06-11 15:51:17 -07:00
Eric Anholt 2655005762 [gem] Move potentially device-specific ioctls to the intel driver.
This is the create (may want location flags), pread/pwrite/mmap
(performance tuning hints), and set_domain (will 32 bits be enough for
everyone?) ioctls.  Left in the generic set are just flink/open/close.

The 2D driver must be updated for this change, and API but not ABI is broken
for 3D.  The driver version is bumped to mark this.
2008-06-11 14:42:40 -07:00
Eric Anholt 2150da5d1a [gem] Manage the ringbuffer from the kernel in the GEM case.
This requires that the X Server use the execbuf interface for buffer
submission, as it no longer has direct access to the ring.  This is
therefore a flag day for the gem interface.

This also adds enter/leavevt ioctls for use by the X Server.  These would
get stubbed out in a modesetting implementation, but are required while
in an environment where the device's state is only managed by the DRM while
X has the VT.
2008-06-10 22:57:07 -07:00
Keith Packard 56a96841d0 [intel-gem] Add explicit throttle ioctl
Instead of throttling and execbuffer time, have the application ask to
throttle explicitly. This allows the throttle to happen less often, and
without holding the DRM lock.
2008-06-06 13:00:46 -07:00
Eric Anholt 461bfa3da6 Merge commit 'origin/master' into drm-gem
Conflicts:

	linux-core/Makefile.kernel
	shared-core/i915_drv.h
	shared-core/nouveau_state.c
2008-05-30 14:42:08 -07:00
Keith Packard 7cf3fd29fe [intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25 20:45:20 -07:00
Eric Anholt f650d7240a [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. 2008-05-12 13:17:01 -07:00
Keith Packard a37ac493da [intel-GEM] Clean up GEM ioctl naming.
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Keith Packard 9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Eric Anholt 5f5f01ed91 GEM: Extend cache domain stuff for 965.
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
Keith Packard 631e86c5c4 Start coding up memory domains 2008-05-06 14:43:49 -07:00
Keith Packard 0d547c9ed9 Add alignment to all aperture allocation requests.
When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
Keith Packard 30efad5113 Fix gem ioctls to be 32/64-bit clean.
mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
Eric Anholt 793549116e Add pin/unpin object ioctls for gem. 2008-05-01 15:40:02 -07:00
Eric Anholt ccd1bae0f6 checkpoint: relocations support. 2008-05-01 15:22:21 -07:00
Eric Anholt 2140e102f9 checkpoint: rename to GEM and a few more i915 bits. 2008-05-01 11:39:20 -07:00
Eric Anholt 1a84067950 Hacking towards hooking up execbuffer. 2008-04-30 16:03:15 -07:00
Xiang, Haihao feff72929e i915: fix for compatibility mode 2008-04-23 17:17:16 +08:00
Thomas Hellstrom 612c22f131 Working revision. 2008-02-29 15:38:55 +01:00
Kristian Høgsberg b0fee67a30 i915: Remove leading underscore from struct tags.
This matches the changes in mesa to use the system drm includes
for the definitions of the drm ioctl structs.
2008-02-22 00:12:39 -05:00
Alan Hourihane 9d1061b8cf fix SAREA 2008-02-20 22:23:31 +00:00
Kristian Høgsberg 373dbcf8b2 i915: Add a dri2 init path that gets the lock from the dri2 sarea. 2008-02-13 13:34:02 -05:00
Kristian Høgsberg ee15459483 i915: Add I915_PARAM_CHIPSET_ID param to get chipset ID. 2008-02-13 13:34:02 -05:00
Dave Airlie 34b71eb451 i915 make relocs use copy from user
Switch relocs to using copy from user and remove index and pass buffer
handles in instead.
2008-01-24 14:37:40 +10:00
Dave Airlie dc338921f9 drm: more cleanups 2007-11-29 09:38:21 +10:00
Dave Airlie 5dc5c36e62 drm: major whitespace/coding style realignment with kernel 2007-11-22 16:10:36 +10:00
Dave Airlie 6ff4a70a2b i915: add context handle to superioctl struct
This will be used later for lockless operation.
2007-11-22 09:18:28 +10:00
Dave Airlie 7f6bf84c23 drm: remove lots of spurious whitespace.
Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
Dave Airlie 74001c34e5 i915: add superioctl support to i915
This adds the initial i915 superioctl interface. The interface should be
sufficent even if the implementation may needs fixes/optimisations internally
in the drm wrt caching etc.
2007-10-12 10:54:38 +10:00
Jesse Barnes 0bb2395a8b Revert drm_i915_flip_t braindamage
I should not have renamed this field.
I should not have renamed this field.
I should not have renamed this field.

On the plus side, it was at least binary compatible.
2007-09-28 10:10:08 -07:00
Jesse Barnes 852232fb80 Remove plane->pipe mapping from SAREA private after all
We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
2007-09-12 08:55:33 -07:00
Jesse Barnes 3cb8acd5ab Disambiguate planes & pipes for swap operations
This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).

It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
2007-09-11 03:48:46 -07:00
Dave Airlie b95ac8b7b3 drm: detypedef drm.h and fixup all problems 2007-07-16 11:22:15 +10:00
Wang Zhenyu 109e2a10f2 Add support for the G33, Q33, and Q35 chipsets.
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory.  So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
Michel Dänzer 6f89584e13 i915: Improved page flipping support, including triple buffering.
Pages are tracked independently on each pipe.

Bump the minor version for 3D clients to know page flipping is usable, and
bump driver date.
2007-02-19 15:08:40 +01:00
Zou Nan hai f7180349fd i915: ARB_Occlusion_query(MMIO ioctl) support.
This adds a new ioctl for passing counter information from the chip back to
applications, these counters include the data needed to perform OC.
2007-01-06 16:22:08 -08:00
Michel Dänzer f9aa4f5973 Add SAREA fileds for determining which pipe to sync window buffer swaps to.
(cherry picked from c2bdb76814 commit)
2006-09-29 12:55:08 +02:00
Michel Dänzer 1f3493f65b DRM_I915_VBLANK_SWAP ioctl: Take drm_vblank_seq_type_t instead of pipe number.
Handle relative as well as absolute target sequence numbers.

Return error if target sequence has already passed, so userspace can deal with
this situation as it sees fit.

On success, return the sequence number of the vertical blank when the buffer
swap is expected to take place.

Also add DRM_IOCTL_I915_VBLANK_SWAP definition for userspace code that may want
to use ioctl() instead of drmCommandWriteRead().
(cherry picked from d5a0f10751 commit)
2006-09-29 12:55:08 +02:00
Michel Dänzer da75d59cd6 i915: Add ioctl for scheduling buffer swaps at vertical blanks.
This uses the core facility to schedule a driver callback that will be called
ASAP after the given vertical blank interrupt with the HW lock held.
(cherry picked from 257771fa29 commit)
2006-09-29 12:55:08 +02:00
Thomas Hellstrom f613022cee Allow a "native type" to be associated with a fence sequence.
In the intel case, we can associate a flush with a sequence.
2006-09-15 16:47:09 +02:00
Thomas Hellstrom 191e284709 More bugfixes.
Disable the i915 IRQ turnoff for now since it seems to be causing problems.
2006-09-12 12:01:00 +02:00
Dave Airlie 7a46d41399 i965 code and Linux coding style < 0
smack my whitespace up.
2006-08-10 14:38:50 +10:00
Alan Hourihane 48cb9aceed Add support for Intel i965G chipsets.
This is a patch prepared by Guangdeng Liao based off of Tungsten Graphics's
final code drop.
2006-08-08 15:05:54 -07:00
Keith Packard 83f256e60e Add i915 ioctls to configure pipes for vblank interrupt.
i915 vblanks can be generated from either pipe a or b, however a disabled
    pipe generates no interrupts. This change allows the X server to select
    which pipe generates vblank interrupts.
2006-06-19 20:15:53 +00:00
Alan Hourihane f19c9eecd1 other part of revert 2006-01-24 21:18:41 +00:00
Alan Hourihane 270cffbe43 Fix CMDBUFFER path, add heap destroy and flesh out sarea for rotation
(Tungsten Graphics)
2006-01-23 10:05:22 +00:00
Dave Airlie b14d15ac41 Add vblank support to i915 DRM.. 2005-12-28 23:49:59 +00:00
Eric Anholt c6344e8df5 Assert an MIT copyright on sis_drm.h, since one was lacking and I created
that particular file. Its contents have changed a good bit since the
    original sis code, and the original sis code didn't care much about
    attribution since it routinely disclaims Precision Insight/VA Linux
    from responsibility. Also, adjust formatting around license headers
    (have a comment open immediately before the "Copyright" line, not as a
    runon of any previous comments) for automatic processing into FreeBSD,
    where /*- is used to signal the beginning of license headers for
    automatic compilation of license lists.
2005-11-28 23:10:41 +00:00