Commit Graph

7 Commits (544fab624d3322a37de907b06fc4fb60f906a094)

Author SHA1 Message Date
Swathi Dhanavanthri bb4e154d3d intel: sync i915_pciids.h with kernel
Changes:
3882581753d1 ("drm/i915/tgl: Add new PCI IDs to TGL")

Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Reviewed-by: Timo Aaltonen <timo.aaltonen@canonical.com>
2020-03-23 13:51:19 +02:00
José Roberto de Souza 4c31d1181b intel: sync i915_pciids.h with kernel
Changes:
651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
b6a8781a447c ("drm/i915/cml: Remove unsupport PCI ID")
8717c6b7414f ("drm/i915/cml: Separate U series pci id from origianl list.")

v2: added the latest CML changes

Cc: James Ausmus <james.ausmus@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-12-17 13:27:46 -08:00
Anusha Srivatsa 10cd9c3da8 intel: sync i915_pciids.h with kernel
Add the new CML PCI IDS.

Align with kernel commit:
bfc4c359b2822 ("drm/i915/cml: Add Missing PCI IDs")

This is in sync with kernel header as of:
0747590267e7 ("drm-tip: 2019y-08m-30d-18h-03m-18s UTC integration manifest")

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2019-09-06 13:12:14 -07:00
Lucas De Marchi 3bda60fd14 intel: sync i915_pciids.h with kernel
Straight copy from the kernel file, aligned with drm-intel-next-queued
commit cb823ed9915b ("drm/i915/gt: Use intel_gt as the primary object
for handling resets")

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-07-29 16:55:40 -07:00
Anusha ae836decb4 intel: sync i915_pciids.h with kernel
Add CML and EHL PCI IDs, and one more for ICL. This is in sync with
kernel header as of b024ab9b2d3a ("drm/i915/bios: iterate over child
devices to initialize ddi_port_info")

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-03-25 14:34:13 -07:00
Rodrigo Vivi 70a1ae89be intel: sync i915_pciids.h with kernel
Straight copy from the kernel file.

Add more PCI Device IDs for Coffee Lake, Ice Lake,
and Amber Lake. It also include a reorg on Whiskey Lake IDs.

Align with kernel commits:

5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-02-04 10:45:53 -08:00
Lucas De Marchi 4e81d4f9c9 intel: add generic functions to check PCI ID
This will allow platforms to reuse kernel IDs instead of manually
keeping them in sync. In most of the cases we only need to extend
IS_9XX().  Current platforms that fit this requirement can be ported
over to use this macro. Right now it's a nop since it doesn't have any
PCI ID added.

The i915_pciids.h header is in sync with kernel tree on
drm-tip 2018y-08m-20d-21h-41m-11s.

v2: - move to a separate .c so we can have the array in a single
      compilation unit
    - use a single array for all gens
    - add real functions to get or check gen by pciid
    - define our own pci device struct rather than inherit the one
      kernel uses: we can throw away most of the fields

v3: - add comment to keep ids sorted by gen
    - remove misleading comment about all gens

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:04 -07:00