5c27f8a70e
Add support SiS based XGI chips to SiS DRM.
2007-06-26 09:51:55 -07:00
9f617522d9
nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303
2007-06-25 01:57:57 +10:00
3dfc13e2da
nouveau: kill some dead code
2007-06-24 19:00:44 +10:00
5f05cd7086
nouveau: NV04/NV10/NV20 PGRAPH engtab functions
...
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about
how they work to implement them sanely. The "old" context_switch() code
remains hooked up, so it shouldn't break anything.
NV20 will probably break if load_context() works. No inital context values
are filled in, so when the first channel is created PGRAPH will probably end
up having its state zeroed. Some setup from nv20_graph_init() will probably
need to be moved to the per-channel context setup.
2007-06-24 19:00:26 +10:00
5d55b0655c
nouveau: NV3X PGRAPH engtab functions
2007-06-24 18:58:38 +10:00
341bc78207
nouveau: NV1X/2X/3X PFIFO engtab functions
...
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
2007-06-24 18:58:14 +10:00
05d86d950a
nouveau: NV04 PFIFO engtab functions
2007-06-24 18:57:09 +10:00
acb710d1a5
nouveau: NV4X PGRAPH engtab functions
2007-06-24 18:56:40 +10:00
f2e64d5276
nouveau: NV4X PFIFO engtab functions
2007-06-24 18:56:01 +10:00
0afb3b518e
nouveau: split PFIFO/PGRAPH context creation
2007-06-24 18:55:23 +10:00
9dbf322d26
nouveau: (mostly) hook up put_base again
2007-06-24 18:55:06 +10:00
24b71c318a
nouveau: prototype PFIFO/PGRAPH engtab API
2007-06-24 18:54:51 +10:00
5c7c07fd49
nouveau: rename engtab functions
2007-06-24 18:54:36 +10:00
068ffc1e1b
radeon: Acknowledge all interrupts we're interested in.
...
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-22 11:55:26 +02:00
40f6a696cb
r300: Synchronized the register defines file; documentation changes.
2007-06-21 14:35:11 +00:00
213732af43
r300: Allow writes to R300_VAP_PVS_WAITIDLE.
2007-06-21 14:32:58 +00:00
215787e429
r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1.
2007-06-18 08:42:46 +00:00
8038e7b60f
r300: Synchronized the register defines file again.
2007-06-18 08:36:50 +00:00
3d5d41fa98
i915: Fix handling of breadcrumb counter wraparounds.
2007-06-15 17:13:11 +02:00
3181573073
r300: Added the CP maximum fetch size and ring rptr update variables.
2007-06-08 19:40:57 +00:00
39625f9621
r300: Small correction to the previous commit.
2007-06-05 19:19:42 +00:00
9e0bd88c61
r300: Document more of the RADEON_RBBM_STATUS register.
2007-06-05 19:05:49 +00:00
109e2a10f2
Add support for the G33, Q33, and Q35 chipsets.
...
These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory. So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
4327d7f314
nouveau: fix RAMHT wrapping
2007-06-04 10:49:30 +10:00
a05d4fecd3
radeon: refine irq acking for vbl on crtc 2
2007-06-03 18:30:52 +10:00
8d95f4bd91
Revert "move i915 to new drm_wait_on function"
...
This reverts commit feb6803778
2007-06-03 18:11:44 +10:00
4e9d215bdf
radeon: add support for vblank on crtc2
...
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
5c394b309d
i915: Add support for 945GME chip
2007-05-31 11:09:15 +01:00
3917f85c73
i915: Add support for 965GME/GLE chip.
2007-05-31 11:09:07 +01:00
b0c8d885ce
Update a bunch of FreeBSD port code.
...
Tested on r200/r300. i915 updates still remain to be done.
2007-05-29 15:02:44 -07:00
2bb7703698
drm: spinlock initializer cleanup
2007-05-26 05:20:59 +10:00
ad02c536df
radeon: add other IGP chipsets
2007-05-26 04:02:55 +10:00
58b2ed7832
Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls."
...
This reverts commit 3fdef0dc20
2007-05-26 03:48:08 +10:00
375f3f2884
Revert "drm/ttm: cleanup most of fence ioctl split out"
...
This reverts commit 3dfc1400e9
2007-05-26 03:47:48 +10:00
ce58e53a01
whitespace fixups from kernel
2007-05-26 03:32:34 +10:00
3dfc1400e9
drm/ttm: cleanup most of fence ioctl split out
2007-05-26 03:32:34 +10:00
3fdef0dc20
drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
...
This is the first bunch of ioctls
2007-05-26 03:32:34 +10:00
7b48f0022a
drm: cleanup use of Linux list handling macros
...
This makes the drms use of the list handling macros a lot cleaner
and more along the lines of how they should be used.
2007-05-26 04:26:24 +10:00
ca725bba84
r300: Added my comments into r300_reg.h.
2007-05-13 16:18:54 +00:00
c6ff0caaa3
r300: Synchronized R300 register defines file.
...
Just moved the indent control comments so that indent doesn't try to change
anything.
2007-05-13 07:53:57 +00:00
e9b604ed3f
nouveau : nv10 graph move clipping value to per channel init
2007-05-12 15:36:48 +02:00
5d623935c0
nouveau : nv10 graph clipping values were forgoten in ddx to drm commit
2007-05-12 15:36:48 +02:00
e4d163d81a
Allow vblank interrupts to remain disabled across VT switch.
...
i915_driver_irq_postinstall was forcing vblank interrupts to pipe A when
called with vblank interrupts disabled. This caused vblank interrupts to be
accidentally re-enabled when VT switching the X server. Instead, start the
driver with vblank interrupts enabled on pipe A to support older X servers,
but then leave control over the state to the X server if it is able to do so.
2007-05-10 13:15:32 -07:00
e0056c7eb4
r300: Synchronized R300 register defines file.
2007-05-09 18:31:31 +00:00
a02b045142
r300: Synchronized R300 register defines file.
2007-05-09 15:22:40 +00:00
59784116bf
nouveau : fix fifo context size for nv10
2007-05-08 21:20:25 +02:00
4e858f8811
r300: Synchronize the register file from Mesa.
2007-05-06 12:47:03 +00:00
87ec1fea6c
r300: Use the defined names for known registers.
2007-05-06 12:35:16 +00:00
f06ad82ecd
Fix userspace ABI breakage from 3c384a9ad5.
2007-05-01 17:03:55 +02:00
ca1cd3257c
radeon: Don't mess up page flipping when a file descriptor is closed.
...
There can still be other contexts that may use page flipping later on, so don't
just unilaterally 'clean it up', which could lead to the wrong page being
displayed, e.g. when running 3D apps with a GLX compositing manager such as
compiz using page flipping.
2007-04-29 12:37:51 +02:00
Ian Romanick
Ben Skeggs
Michel Dänzer
Oliver McFadden
Alex Deucher
Wang Zhenyu
Maurice van der Pot
Dave Airlie
Jung-uk Kim
Thomas Gleixner
Matthieu Castet
Keith Packard