2407ce57de
Fix drmMMUnlock / drmMMLock return values.
2007-06-13 15:59:28 +02:00
62082ab3e6
Make sure we read fence->signaled while spinlocked.
2007-06-13 15:38:59 +02:00
5156f1c897
Fix fence object deref race.
2007-06-13 15:19:30 +02:00
1a4b9294a2
Remove unnecessary (and uncommented!) read barrier from the interrupt
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path. It doesn't appear to serve any useful purpose.
2007-06-12 16:29:09 -07:00
ca47fa90b7
Update vblank code:
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- move pre/post modeset ioctl to core
- fixup i915 buffer swap
- fix outstanding signal count code
- create new core vblank init routine
- test (works with glxgears)
- simplify i915 interrupt handler
2007-06-12 13:35:41 -07:00
db689c7b95
Initial checkin of vblank rework. Code attempts to reduce the number
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of vblank interrupt in order to save power.
2007-06-12 10:44:21 -07:00
f984b1b8d1
Fix some obvious bugs.
2007-06-12 12:30:33 +02:00
b6b5df24b9
Try to make buffer object / fence object ioctl args 64-bit safe.
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Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
2007-06-12 12:21:38 +02:00
280083d4a2
use krh's idr mods to remove lists from idr code
2007-06-10 15:40:21 +10:00
3181573073
r300: Added the CP maximum fetch size and ring rptr update variables.
2007-06-08 19:40:57 +00:00
7426da7538
oops must fix this properly at some point
2007-06-07 18:45:00 +10:00
e22f428f5f
drm: fix radeon setparam alignment issues on 32/64-bit
2007-06-07 18:41:18 +10:00
abf35cbdcf
radeon: PCIGART memory is Can't map aperture as well there is one
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on the CPU.... with this my indirect buffers at least start to live..
(cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122)
2007-06-07 15:37:03 +10:00
39625f9621
r300: Small correction to the previous commit.
2007-06-05 19:19:42 +00:00
9e0bd88c61
r300: Document more of the RADEON_RBBM_STATUS register.
2007-06-05 19:05:49 +00:00
109e2a10f2
Add support for the G33, Q33, and Q35 chipsets.
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These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory. So, we have the X Server allocate that memory and tell
us the address, instead.
2007-06-05 11:15:29 -07:00
03ce98aa28
set start to gart_vm_start at least
2007-06-05 18:23:24 +10:00
96705ce664
add wbinvd calls
2007-06-05 18:23:05 +10:00
5bd0ca125e
remove include of linux ioctl32.h from drm drivers
2007-06-05 18:16:44 +10:00
c9dbe0f2c2
invalidate gart tlb on PCIE after table change
2007-06-05 12:38:43 +10:00
f6e8023e03
take the lock earlier in ttmtest
2007-06-05 12:26:18 +10:00
4294dcc050
complete PCIE backend for ttm
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ttm test runs with it at least, needs to do more testing on it
2007-06-05 12:26:06 +10:00
234a906200
WIP cleanup
2007-06-05 10:47:42 +10:00
77b9d9d16b
cleanup pcigart ttm for new backend layout
2007-06-05 10:35:41 +10:00
07345af838
Merge branch 'origin' into radeon-ttm
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Conflicts:
shared-core/radeon_drv.h
2007-06-05 10:09:11 +10:00
4327d7f314
nouveau: fix RAMHT wrapping
2007-06-04 10:49:30 +10:00
a05d4fecd3
radeon: refine irq acking for vbl on crtc 2
2007-06-03 18:30:52 +10:00
a4cddc6596
Revert "drm: add new drm_wait_on function to replace macro"
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This reverts commit 6e860d08d0
2007-06-03 18:12:28 +10:00
8d95f4bd91
Revert "move i915 to new drm_wait_on function"
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This reverts commit feb6803778
2007-06-03 18:11:44 +10:00
4e9d215bdf
radeon: add support for vblank on crtc2
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This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-03 16:28:21 +10:00
638c8087de
drm: fixup initialisation of list heads and idr
2007-06-01 19:00:24 +10:00
704ca06389
WIP more code for radeon
2007-06-01 18:12:45 +10:00
5c394b309d
i915: Add support for 945GME chip
2007-05-31 11:09:15 +01:00
3917f85c73
i915: Add support for 965GME/GLE chip.
2007-05-31 11:09:07 +01:00
b0c8d885ce
Update a bunch of FreeBSD port code.
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Tested on r200/r300. i915 updates still remain to be done.
2007-05-29 15:02:44 -07:00
fdc293d40c
reformatting, clean-ups
2007-05-29 14:56:17 -06:00
ccd7b6e8dd
Clean-ups and reformatting.
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Use 4-space indentation consistently.
Replace occurances of:
if (cond) code;
with:
if (cond)
code;
to facilitate putting breakpoints on code.
2007-05-29 14:54:00 -06:00
056c2f249a
drm: move context handling code to use linux idr
2007-05-27 08:44:38 +10:00
f64674743a
drm: convert drawable handling to use Linux idr
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This cleans this code up a lot and uses the generic Linux idr which is
designed for this.
Signed-off-by: Dave Airlie <airlied@linux.ie>
2007-05-27 07:26:52 +10:00
2bb7703698
drm: spinlock initializer cleanup
2007-05-26 05:20:59 +10:00
8e083c522e
drm: make sure the drawable code doesn't call malloc(0).
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Signed-off-by: Michel Dänzer <michel@tungstengraphics.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2007-05-26 04:35:54 +10:00
ad02c536df
radeon: add other IGP chipsets
2007-05-26 04:02:55 +10:00
58b2ed7832
Revert "drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls."
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This reverts commit 3fdef0dc20
2007-05-26 03:48:08 +10:00
375f3f2884
Revert "drm/ttm: cleanup most of fence ioctl split out"
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This reverts commit 3dfc1400e9
2007-05-26 03:47:48 +10:00
ce58e53a01
whitespace fixups from kernel
2007-05-26 03:32:34 +10:00
adee6f52e6
ati_pcigart: cut to 80 chars
2007-05-26 03:32:34 +10:00
3dfc1400e9
drm/ttm: cleanup most of fence ioctl split out
2007-05-26 03:32:34 +10:00
3fdef0dc20
drm/ttm: cleanup mm_ioctl ioctls to be separate ioctls.
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This is the first bunch of ioctls
2007-05-26 03:32:34 +10:00
7b48f0022a
drm: cleanup use of Linux list handling macros
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This makes the drms use of the list handling macros a lot cleaner
and more along the lines of how they should be used.
2007-05-26 04:26:24 +10:00
fa92e1f2ec
Suspend/resume shouldn't call drm_initial_config (seems to work ok for me now),
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also we should fail if we can't enable the device at resume time.
2007-05-24 18:41:44 -07:00
Thomas Hellstrom
Jesse Barnes
Jesse Barnes
Jesse Barnes
Dave Airlie
Oliver McFadden
Dave Airlie
Alex Deucher
Wang Zhenyu
Maurice van der Pot
David Airlie
Jung-uk Kim
Brian
Thomas Gleixner
Michel Dänzer