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17 Commits (78a4f5c1bc37cbc581191f47b8b19250bfb86c1e)

Author SHA1 Message Date
Matthieu Castet f04347f371 nouveau: nv20 graph ctx switch. 
Untested...
 2007-01-13 23:19:41 +01:00
Matthieu Castet 4ae64a1b58 nouveau: add and indent pgraph regs 2007-01-13 21:44:50 +01:00
Stephane Marchesin 1967aa82cf nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value. 2007-01-13 12:32:50 +01:00
Jeremy Kolb 4297a83b48 nouveau: get nv30 context switching to work. 
* Pulled in some registers from nv10reg.h.  Needed for context switching.
* Filled in nv30 graphics context (based on nv40_graph.c).
* Figure out nv30 context table, set up on context creation.  Allows the cards automatic switching to work.
 2007-01-12 00:14:54 -05:00
Ben Skeggs dbb0d979cc nouveau: Use PMC_BOOT_0 to determine which ctx_voodoo to load. 2007-01-06 17:50:00 +11:00
Stephane Marchesin f80659bc29 Cleanup the nv04 fifo code a bit. 2007-01-05 19:37:06 +01:00
Matthieu Castet f48a7685bd For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context. 
When cleaning a fifo, we shouldn't assume everybody use nv40 ;)
Fill DMA_SUBROUTINE fill correct value.
 2006-11-28 21:32:03 +01:00
Ben Skeggs 2fd812f8ef Completely untested NV10/20/30 FIFO context switching changes. 2006-11-14 09:00:31 +11:00
Ben Skeggs 7002082944 Restructure initialisation a bit. 
- Do important card init in firstopen
 - Give each channel it's own cmdbuf dma object
 - Move RAMHT config state to the same place as RAMRO/RAMFC
 - Make sure instance mem for objects is *after* RAM{FC,HT,RO}
 2006-11-14 08:11:49 +11:00
Dave Airlie 2dd3c039fd fixup fifo size so it is page aligned 2006-11-06 11:42:15 +11:00
Ben Skeggs b5cf0d635c Remove hack which delays activation of a additional channel. The previously active channel's state is saved to RAMFC before PFIFO gets clobbered. 2006-10-18 02:37:19 +11:00
Ben Skeggs 55de3f763f Useful output on a FIFO error interrupt. 2006-10-17 23:44:05 +11:00
Ben Skeggs 1943f39d8c Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup code a bit. 2006-10-17 06:37:40 +11:00
Ben Skeggs 95486bbde0 Some info on NV40's RAMFC 2006-10-17 06:12:18 +11:00
Stephane Marchesin 7ef44b2b8d Still more work on the context switching code. 2006-10-12 17:31:49 +02:00
Stephane Marchesin dd473411f8 Context switching work. 
Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet).
Removed the PFIFO_REINIT ioctl. I hope it's that a good idea...
Requires the upcoming commit to the DDX.
 2006-10-11 00:28:15 +02:00
Dave Airlie fef9b30a2b initial import of nouveau code from nouveau CVS 2006-08-27 08:55:02 +10:00