Commit Graph

119 Commits (7dbeb18777a4dc1e7eb3c6bc4da3e72456afc8fc)

Author SHA1 Message Date
Keith Packard 867c2bb461 [intel-gem] reloc_and_validate_object → object_bind_and_relocate
Just renaming this function and related parameters to match terminology used
elsewhere in the driver.
2008-06-02 12:37:10 -07:00
Keith Packard 1cb2940a25 [intel-gem] Propagate set_domain errors.
set_domain can block waiting for rendering to complete. If that process is
interrupted by a signal, it can return -EINTR. Catch this error in all
callers and correctly deal with the result.
2008-06-02 10:59:15 -07:00
Eric Anholt 50bce2bc62 [intel-gem] Only update obj->write_domain if we're actually changing it.
The problem was revealed where on 965, the display list vertex buffer would see:

create		      -> (CPU, CPU)
set_domain (CPU, CPU) -> (CPU, CPU)
set_comain (CPU, 0)   -> (CPU, 0) (no clflush occurred)
execbuf	   (GPU, 0)   -> (CPU+GPU, 0) (still no clflush)

instead of:

create		      -> (CPU, CPU)
set_domain (CPU, CPU) -> (CPU, CPU)
set_comain (CPU, 0)   -> (CPU, CPU)
execbuf	   (GPU, 0)   -> (CPU+GPU, 0) (clflushed)
2008-05-30 13:47:34 -07:00
Eric Anholt 4f92ed3427 [intel-gem] Add an option to check GTT versus CPU coherency at execbuf time. 2008-05-30 12:42:48 -07:00
Eric Anholt 3b1e4e6dc3 [intel-gem] Write the presumed_offset back out after updating it.
Otherwise, 965 constant state buffers get re-relocated every exec.  Ouch.
2008-05-29 12:53:21 -07:00
Keith Packard 19ff3366e4 [intel-gem] Clean up active/inactive/flushing list debugging. 2008-05-28 23:56:31 -07:00
Eric Anholt e10502002f [intel-gem] Replace idlelock usage with real lock acquisition. 2008-05-27 18:03:18 -07:00
Keith Packard 1f4e36081b [intel-gem] Must hold DRM lock while setting object domain
Object domain transfer can involve adding flush ops to the request queue,
and so the DRM lock must be held to avoid having the X server smash pointers
badly.
2008-05-26 17:41:46 -07:00
Keith Packard d434b64f6a [i915] leave interrupts masked off when not in use.
The interrupt enable register cannot be used to temporarily disable
interrupts, instead use the interrupt mask register.

Note that this change means that a pile of buffers will be left stuck on the
chip as the final interrupts will not be recognized to come and drain things.
2008-05-26 03:25:16 -07:00
Keith Packard 7cf3fd29fe [intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25 20:45:20 -07:00
Keith Packard 6d1d11704a [intel-gem] Compute npages instead of nbytes in flush_pwrite
i915_gem_flush_pwrite optimizes short writes to the buffer by clflushing
only the modified pages, but it was miscomputing the number of pages.
2008-05-25 20:44:19 -07:00
Keith Packard c69b81df62 [intel-gem] replace call to jiffies_to-msec with simple inline 2008-05-25 20:41:42 -07:00
Keith Packard 8c2b207f9b [intel-gem] Encourage multiple caches to hold read data
When reading from multiple domains, allow each cache to continue
to hold data until writes occur somewhere. This is done by
first leaving the read_domains alone at bind time (presumably the CPU read
cache contains valid data still) and then in set_domain, if no write_domain
is specified, the new read domains are simply merged into the existing read
domains.

A huge comment was added above set_domain to explain how things are
expected to work.
2008-05-22 23:08:38 -07:00
Keith Packard 44ed693ca6 [gem] Use CPU domain for new or pageable objects
Newly allocated objects need to be in the CPU domain as they've just been
cleared by the CPU. Also, unmapping objects from the GTT needs to put them
into the CPU domain, both to flush rendering as well as to ensure that any
paging action gets flushed before we remap to the GTT.
2008-05-22 22:00:21 -07:00
Keith Packard 71b09a5f75 [intel-gem] Force ring retire by emiting flush before user-interrupt.
Commands in the ring are parsed and started when the head pointer passes by
them, but they are not necessarily finished until a MI_FLUSH happens. This
patch inserts a flush after the execbuffer (the only place a flush wasn't
already happening).
2008-05-22 22:00:21 -07:00
Keith Packard da3f099a7c [intel-gem] invalidate ring locals for pin/unpin/set_domain/free functions
Ring locals must be reloaded from hardware in case the X server ran.
2008-05-22 22:00:21 -07:00
Eric Anholt 5e662f90d1 [gem] Release GEM buffers from work task scheduled from IRQ.
There are now 3 lists.  Active is buffers currently in the ringbuffer.
Flushing is not in the ringbuffer, but needs a flush before unbinding.
Inactive is as before.  This prevents object_free → unbind →
wait_rendering → object_reference and a kernel oops about weird refcounting.

This also avoids an synchronous extra flush and wait when freeing a buffer
which had a write_domain set (such as a temporary rendered to and then from
using the 2d engine).  It will sit around on the flushing list until the
appropriate flush gets emitted, or we need the GTT space for another
operation.
2008-05-22 22:00:21 -07:00
Eric Anholt d6f7968577 [gem] Replace ring throttling hack with actual time measurement. 2008-05-21 16:40:14 -07:00
Eric Anholt 54fa32cdfe [gem] Fix bad test for list_for_each completion.
Since it's a circular list, the entry won't be NULL at termination.
2008-05-21 15:15:58 -07:00
Eric Anholt 7078978db0 [gem] Hold a reference on the object in i915_gem_wait_space.
Otherwise, in the middle of the function called using it the last ref
might disappear.
2008-05-21 15:04:07 -07:00
Keith Packard f8e38e49dd [intel-gem] invalidate ring locals for pin/unpin/set_domain/free functions
Ring locals must be reloaded from hardware in case the X server ran.
2008-05-21 15:00:16 -07:00
Eric Anholt af8e087157 [gem] Use a separate sequence number field from classic/ttm
This lets us get some qualities we desire, such as using the full 32-bit
range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active
sequence numbers to request structs, which will be used soon for throttling
and interrupt-driven list cleanup.
2008-05-20 14:16:26 -07:00
Eric Anholt ab36a6f983 [gem] Rename sequence numbers from "cookie" to "seqno" 2008-05-20 10:53:10 -07:00
Eric Anholt 6c3ac484b0 [gem] Clean up active/inactive list handling using helper functions.
Additionally, a boolean active field is added to indicate which list an
object is on, rather than smashing last_rendering_cookie to 0 to show
inactive.  This will help with flush-reduction later on, and makes the code
clearer.
2008-05-20 10:52:39 -07:00
Eric Anholt 7dced2f33a [gem] Hold dev->struct_mutex to protect structure data. 2008-05-15 18:45:23 -07:00
Eric Anholt 3ab152da66 [gem] Rename the GTT LRU lists to active (executing) and inactive (idle). 2008-05-15 11:59:58 -07:00
Keith Packard 17e8000ac0 [intel] Minor kludge -- wait for the ring to be nearly empty before queuing
No need to fill the ring that much; wait for it to become nearly empty
before adding the execbuffer request. A better fix will involve scheduling
ring insertion in the irq handler.
2008-05-12 13:04:18 -07:00
Keith Packard ff39db099b [GEM] Make pread/pwrite manage memory domains. No luck with movnti though.
pread and pwrite must update the memory domains to ensure consistency with
the GPU. At some point, it should be possible to avoid clflush through this
path, but that isn't working for me.
2008-05-11 00:10:16 -07:00
Keith Packard 1b0bf30143 [intel-GEM] exec list can contain pinned, lru cannot.
The exec list contains all objects, in order of use. The lru list contains
only unpinned objects ready to be evicted. This required two changes -- the
first was to not migrate pinned objects from exec to lru, the second was to
search for the first unpinned object in the exec list when doing eviction.
2008-05-10 22:04:39 -07:00
Keith Packard 1f9eaceb71 Merge commit 'anholt/drm-gem' into drm-gem 2008-05-10 21:05:25 -07:00
Keith Packard a37ac493da [intel-GEM] Clean up GEM ioctl naming.
Rename 'validate_entry' to 'exec_object', then clean up some field names in
structures (renaming buffer_offset to just offset, for example).
2008-05-10 21:04:18 -07:00
Eric Anholt 48a8531aa4 GEM: Fix arguments to drm_memrange_init so we don't exceed our allocation.
It takes (offset, size), not (offset, end).
2008-05-09 18:23:51 -07:00
Eric Anholt c5c59eab80 GEM: Separate the LRU into execution list and LRU list.
Now, the LRU list has objects that are completely done rendering and ready
to kick out, while the execution list has things with active rendering,
which have associated cookies and reference counts on them.
2008-05-09 17:38:32 -07:00
Eric Anholt f56f2acb5a GEM: Clear obj_priv->agp_mem when we free it.
Still managing to get something wrong with this, oopsing down in agp.
2008-05-09 15:07:49 -07:00
Eric Anholt f0ae335cd7 GEM: Avoid leaking refs on target objects on presumed offset success. 2008-05-09 15:02:50 -07:00
Keith Packard ec75369b40 [i915] clean up whinging from checkpatch.pl 2008-05-08 13:09:17 -07:00
Keith Packard 07ad5ce1e1 Clean up whinging from checkpatch.pl in drm_gem.c
Whitespace changes, a few too-long-lines and some extra braces.
2008-05-08 13:08:22 -07:00
Eric Anholt 2f573e6df4 GEM: Fix oops on NULL dereference when we try clflushing when we don't need to. 2008-05-08 12:46:02 -07:00
Keith Packard 9af4c49743 [intel-gem] Move domains to relocation records. add set_domain ioctl.
Domain information is about buffer relationships, not buffer contents. That
means a relocation contains the domain information as it knows how the
source buffer references the target buffer.

This also adds the set_domain ioctl so that user space can move buffers to
the cpu domain.
2008-05-08 10:44:02 -07:00
Eric Anholt 06e9761f94 GEM: Wait for existing rendering to complete before writing relocation data.
This should already have been generally safe since we don't change contents
and put in new relocations between execbufs, so if we were writing in a new
relocation then we'd already waited rendering to complete when we moved
the target of the relocation.  However, doing the right thing will be required
if we do buffer reuse.
2008-05-07 14:10:04 -07:00
Eric Anholt 5f5f01ed91 GEM: Extend cache domain stuff for 965.
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's
a vertex cache that was forgotten.
2008-05-07 12:46:06 -07:00
Keith Packard 6a6c37af9e [intel-GEM] ref count objects in gtt-lru.
If objects on the lru aren't ref counted, they'll get pulled from the gtt as
soon as they are freed. This change does cause objects to get stuck in the
gtt until they're forced out by new requests. The lru should get cleaned
when the irq occurs.
2008-05-06 21:59:06 -07:00
Keith Packard 61253f4f67 [intel-GEM] Add memory domain support.
Memory domains allow the kernel to track which caches to flush and how to
move objects before buffer execution.
2008-05-06 20:00:23 -07:00
Eric Anholt d2373b2a34 GEM: Use irq-based fencing rather than syncing and evicting every exec. 2008-05-06 13:28:26 -07:00
Eric Anholt dd6976c56f GEM: Skip relocation if presumed offset matches. 2008-05-06 11:25:53 -07:00
Eric Anholt 8551bfc6db GEM: Save the last ioremapped page for relocations in case we need it again. 2008-05-06 11:18:57 -07:00
Keith Packard 91cba3ae17 Dump last batch buffer when hardware lockup is detected. 2008-05-05 22:10:02 -07:00
Keith Packard 2c8f970baa Unlock pages right after getting them.
pages come back from find_or_create_page locked, but must not stay locked
for long. Unlock them immediately instead of waiting until we're done with
them to avoid deadlock when applications try to touch them.
2008-05-05 17:17:19 -07:00
Keith Packard 5b0d0fa7f8 Merge commit 'anholt/drm-gem' into drm-gem
Conflicts:

	linux-core/i915_gem.c
2008-05-05 14:40:20 -07:00
Eric Anholt dafe48e623 GEM: Replace drm_memrange_for_each with just evicting what we brought in.
I was wrong about how the data structure worked, and didn't care to fix it
to support debugging code.
2008-05-05 14:38:26 -07:00
Keith Packard d59a9300ec Remove some debug messages. 2008-05-05 14:32:01 -07:00
Keith Packard f0bc796a02 Add object base to relocation store address.
The relocated value was being written to the wrong location, missing
the object base address.
2008-05-05 14:22:42 -07:00
Keith Packard 4867780bd6 Emit clflush and chipset flush when mapping objects to gtt 2008-05-05 13:32:28 -07:00
Keith Packard 4511e6cd80 Correct execbuffer offset. Add memory barrier and chipset flush. 2008-05-05 11:27:06 -07:00
Keith Packard b6f173c430 Add i915_dispatch_gem_execbuffer (broken).
This function submits a gem-based execbuffer to the ring.
It doesn't work yet.
2008-05-05 10:51:49 -07:00
Eric Anholt 166ff364fb Don't forget to set the memrange private, and reset ring on kernel entry. 2008-05-02 17:50:46 -07:00
Keith Packard 5f0614b86f Check for do_mmap errors 2008-05-02 17:13:11 -07:00
Keith Packard ab3549d133 Add a bit of /proc/dri/*/gem support. Clean up some refcount/pagelock issues.
Track named objects in /proc/dri/0/gem_names.
Track total object count in /proc/dri/0/gem_objects.
Initialize device gem data.
return -ENODEV for gem ioctls if the driver doesn't support gem.
Call unlock_page when unbinding from gtt.
Add numerous misssing calls to drm_gem_object_unreference.
2008-05-02 16:34:16 -07:00
Keith Packard 39e20bcd5f Add name/open ioctls, separate handle and pointer ref counts.
Names are just another unique integer set (from another idr object).
Names are removed when the user refernces (handles) are all destroyed --
this required that handles for objects be counted separately from
internal kernel references (so that we can tell when the handles are all
gone).
2008-05-02 12:29:17 -07:00
Keith Packard 49e8e3372a Remove drm_driver argument to functions taking drm_gem_object.
Now that drm_gem_object has a drm_driver * in it, functions don't need both
parameters.
2008-05-02 10:36:00 -07:00
Keith Packard 0d547c9ed9 Add alignment to all aperture allocation requests.
When pinning buffers, or using execbuffer, allow the application to specify
the necessary aperture allocation alignment constraints.
2008-05-01 20:41:55 -07:00
Keith Packard 30efad5113 Fix gem ioctls to be 32/64-bit clean.
mixed 32/64 bit systems need 'special' help for ioctl where the user-space
and kernel-space datatypes differ. Fixing the datatypes to be the same size,
and align the same way for both 32 and 64-bit ppc and x86 environments will
elimiante the need to have magic 32/64-bit ioctl translation code.
2008-05-01 20:31:16 -07:00
Eric Anholt c10695bb7a Unbind objects when freeing, fix some error paths, and warn in others. 2008-05-01 17:31:57 -07:00
Eric Anholt 3f641b56c7 Fix missing member settings in obj/obj_priv, and some error paths. 2008-05-01 16:48:25 -07:00
Eric Anholt d2529d1396 Remove _args from gem ioctl argument structure tags. 2008-05-01 16:27:03 -07:00
Eric Anholt 793549116e Add pin/unpin object ioctls for gem. 2008-05-01 15:40:02 -07:00
Eric Anholt ccd1bae0f6 checkpoint: relocations support. 2008-05-01 15:22:21 -07:00
Eric Anholt 5af87acbc2 checkpoint: gtt binding written. 2008-05-01 14:20:44 -07:00
Eric Anholt 2140e102f9 checkpoint: rename to GEM and a few more i915 bits. 2008-05-01 11:39:20 -07:00