Commit Graph

12 Commits (9e019df75764a7ce79266ceb058307336ddf00ef)

Author SHA1 Message Date
Stephane Marchesin 30acb90a60 Merge the pciid work.
Add getparams for AGP and FB physical adresses.
Fix the MEM_ALLOC issue properly.
Fix context switches for nv44.
Change the DRM version to 0.0.1.
2006-12-03 10:02:54 +01:00
Ben Skeggs 80d75cf695 Use nouveau_mem.c to allocate RAMIN. 2006-11-30 10:31:42 +11:00
Ben Skeggs b1a9a76971 Wrap access to objects in RAMIN.
This will make it easier to support extra RAMIN in vram at a later point.
2006-11-30 08:35:42 +11:00
Ben Skeggs 7002082944 Restructure initialisation a bit.
- Do important card init in firstopen
 - Give each channel it's own cmdbuf dma object
 - Move RAMHT config state to the same place as RAMRO/RAMFC
 - Make sure instance mem for objects is *after* RAM{FC,HT,RO}
2006-11-14 08:11:49 +11:00
Stephane Marchesin 06639801ce Add some getparams. 2006-11-04 20:39:59 +01:00
Stephane Marchesin 7ef44b2b8d Still more work on the context switching code. 2006-10-12 17:31:49 +02:00
Stephane Marchesin dd473411f8 Context switching work.
Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet).
Removed the PFIFO_REINIT ioctl. I hope it's that a good idea...
Requires the upcoming commit to the DDX.
2006-10-11 00:28:15 +02:00
Ben Skeggs 0ef29768ca Fix second start of X server without module reload beforehand, and a couple of other fixes.
- Mark the correct RAMIN slots as free (oops)
- Remove a VRAM alloc that shouldn't have been there (oops)
- Move HT init out of firstopen() and into dma_init()
- Setup PFIFO_RAM{HT,FC,RO} in pfifo_init()
2006-09-07 23:59:19 +10:00
Stephane Marchesin d89c623f8e Remove a 64 bit div. 2006-09-07 00:35:17 +02:00
Ben Skeggs b119966ae6 Allow cmdbuf location(AGP,VRAM) and size to be configured. 2006-09-03 06:36:06 +10:00
Ben Skeggs 24dddc2754 Add stub {get,set}param ioctls. 2006-08-30 16:55:02 +10:00
Dave Airlie fef9b30a2b initial import of nouveau code from nouveau CVS 2006-08-27 08:55:02 +10:00