DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
buffer. The second ioctl copies a command buffer from user space memory
to the ring buffer. The third ioctl waits for engine idle until it
returns.
The motivation for this patch is to avoid the wait for engine idle call
before each buffer flush in the current DRI driver. With this patch,
the DRI driver can continue to flush its buffer as long as there is
free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
buffer copying is necessary to support multiple DRI clients rendering
simultaneously. Otherwise, more CPU time will be spent in the busy loop
waiting for engine idle between DRI context switch. Even in the single
client case, the tradeoff is reasonable in comparision to the kernel
call to check for free buffer space for the client to render directly
to the ring buffer.
a busid that doesn't correspond to the device the DRM is attached to.
This is a breaking of backwards-compatibility only for the
multiple-DRI-head case with X Servers that don't use interface 1.1.
- Move irq_busid to drm_irq.h and make it only return the IRQ for the
current device. Retains compatibility with previous X Servers, cleans
up unnecessary code. This means no irq_busid on !__HAVE_IRQ, but can be
changed if necessary.
- Bump interface version to 1.2. This version when set signifies that the
control ioctl should ignore the irq number passed in and enable the
interrupt handler for the attached device. Otherwise it errors out when
the passed-in irq is not equal to the device's.
- Store the highest version the interface has been set to in the device.
- Fix a recursion on DRM_LOCK in irq_uninstall on FreeBSD. This leaves
irq_uninstall being done without the lock in some cases, but it was
racey anyways.
the 2D driver initializes MC_FB_LOCATION and related registers sanely
the DRM deduces the layout from these registers
clients use the new SETPARAM ioctl to tell the DRM where they think the
framebuffer is located in the card's address space
the DRM uses all this information to check client state and fix it up if
necessary
This is a prerequisite for things like direct rendering with IGP chips and
video capturing.