Commit Graph

3353 Commits (b92f5577670f99ded76e201a71aaa23cce8f7577)

Author SHA1 Message Date
Stuart Bennett 6b903f5edf nouveau: fix nv04 fifo context save to save reg contents, not reg offset
clearly the function had never been used :)
2008-07-29 02:32:13 +01:00
Stuart Bennett 591f6bcba3 nouveau: fix bad rename from 5a072f32c8 2008-07-29 02:26:34 +01:00
Eric Anholt 487c42bd42 intel-gem: Another checkpatch.pl pass. 2008-07-28 11:45:22 -07:00
Eric Anholt 1bdf35fe19 intel-gem: Fix regression tests.
Main fix is an oops that was triggered by the gtt pwrite path when we don't
have the gtt initialized.  Also, settle on -EBADF for "bad object handle",
and -EINVAL for "reading/writing beyond object boundary".
2008-07-28 11:29:16 -07:00
Eric Anholt f85fd1b42d intel-gem: Speed up tiled readpixels by tracking which pages have been flushed.
This is around 3x or so speedup, since we would read wide rows at a time, and
clflush each tile 8 times as a result.  We'll want code related to this anyway
when we do fault-based per-page clflushing for sw fallbacks.
2008-07-28 11:25:19 -07:00
Eric Anholt 04ae66db1c intel-gem: Move debug-only functions to a separate file. 2008-07-26 19:52:47 -07:00
Stefan Becker 514c05cebe radeon: Add suspend/resume hooks for saving/clearing/restoring interrupts.
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=16799 .
2008-07-26 16:49:14 +02:00
Nicolai Haehnle c3d463840c r300_cmdbuf: Always emit INDX_BUFFER immediately after DRAW_INDEX
DRAW_INDEX writes a vertex count to VAP_VF_CNTL. Docs say that behaviour
is undefined (i.e. lockups happen) when this write is not followed by the
right number of vertex indices.

Thus we used to do the wrong thing when drawing across many cliprects was
necessary, because we emitted a sequence
 DRAW_INDEX, DRAW_INDEX, INDX_BUFFER, INDX_BUFFER
instead of
 DRAW_INDEX, INDX_BUFFER, DRAW_INDEX, INDX_BUFFER
The latter is what we're doing now and which ought to be correct.
2008-07-26 16:40:51 +02:00
Robert Noland 7a3d6624c4 [FreeBSD] Duh, we need to actually define the drm_modeset_ctl... 2008-07-25 13:46:28 -04:00
Dave Airlie 50db5aefa1 drm: don't set the signal blocker on the master process.
this lets us debug the X server through xkb startup.

Not sure what the correct answer is, probably X needs to drop
the lock when execing stuff, with input hotplug it can get
xkb stuff at any time I believe.
2008-07-25 13:30:08 +10:00
Robert Noland 2580a065d8 [FreeBSD] Catch up to linux on vblank-rework 2008-07-24 00:21:00 -04:00
Robert Noland 965a72202b i915: Move all of the irq install/uninstall to load time.
This resolves a panic on FreeBSD which was caused by trying
to re-initialize the swap lock.  It's just much easier to
initialize all of the locks at load time.  It should also
ensure that the vblank structures are available earlier.
2008-07-23 19:55:06 -04:00
Eric Anholt 6d258ddf77 intel-gem: Fix pread math and logic errors.
Fixes an oops in fbotexture from walking off the end of the page list.
2008-07-23 11:49:25 -07:00
Eric Anholt 439d710683 intel-gem: Add a quick hack to reduce clflushing on pread.
This increases overhead for the large-readpixels case due to the repeated
page cache accessing, but greatly reduces overhead for the small-readpixels
case.
2008-07-23 10:10:54 -07:00
Eric Anholt bddb952578 intel-gem: Don't do the GTT-pwrite shortcut on tiled buffers.
These will be covered by the fence, while pread/pwrite are supposed to be
CPU-perspective writes, with manual detiling done by the client.
2008-07-23 10:10:48 -07:00
Eric Anholt a5d8f35f0f intel-gem: Move /proc debugging to a separate file. 2008-07-23 10:10:44 -07:00
Dave Airlie 589f968173 radeon: fix typo with a better typo 2008-07-22 18:47:27 +10:00
Dave Airlie c669489813 radeon: fix type DST vs Z cache flush 2008-07-22 18:10:03 +10:00
Robert Noland f57f01f028 [FreeBSD] Improve upper_32_bits define.
Thanks to airlied.
2008-07-21 18:06:52 -04:00
Eric Anholt e31d27857f intel-gem: Remove recently added pci_read_base prototype.
This is in pci.h in the fixed patch to the kernel.
2008-07-21 14:21:16 -07:00
Eric Anholt 67d1521566 intel-gem: Set up HWS when it needs a vaddr during GEM init.
This requires an updated 2D driver to not try to set it up as well.
2008-07-21 14:19:53 -07:00
Michel Dänzer b5cddbcc15 Remove accidental leftover tests.
Thanks to Nicolai Haehnle for pointing this out on IRC.
2008-07-21 13:43:12 +02:00
Michel Dänzer 4be367b84b Reinstate dev->vblank_enabled[].
I incorrectly thought it was obsolete.
2008-07-21 11:48:04 +02:00
Michel Dänzer f529a510d2 Drop workaround for driver vblank counter going backwards.
The driver code that caused this is no longer necessary and has been dropped.
2008-07-21 08:16:59 +02:00
Michel Dänzer e4feaf506d radeon: Post-vblank-rework-rework cleanups.
Thanks to the reworked vblank-rework, we can just use the hardware frame
counter directly, and make the RADEON_PARAM_VBLANK_CRTC getparam just return
what was set by the corresponding setparam.
2008-07-21 08:16:59 +02:00
Michel Dänzer 205aff6a5c vblank-rework rework cleanups.
Remove some dead/obsolete code and make drm_update_vblank_count() static.
2008-07-21 08:16:55 +02:00
Michel Dänzer 014935b680 Remove obsolete dev->vblank_suspend[crtc] tests.
Caused drm_update_vblank_count() not to do its thing when called from
drm_modeset_ctl() -> drm_vblank_get().

The vblank functionality no longer needs to be suspended during a modeset, so
rename the field to vblank_inmodeset.
2008-07-21 08:13:45 +02:00
Jesse Barnes 04893aa99a i915: convert to using drm_vblank_get/put around vblank counter usage
All interrupt off vblank count updates are done in drm_vblank_get/put
now, so convert users of the vblank counter over to that interface.
2008-07-19 13:21:38 -04:00
Jesse Barnes 6ac1f8a760 Update vblank code to new API
In my last push I forgot to convert users of drm_update_vblank_count
over to drm_vblank_get/put, since that's where any interrupt off->on
update accounting is done now.  Since the modeset ioctl did something
similar (an open coded update of the counter) convert it over to using
get/put too, which saves us from having to deal with every combination
of interrupt off & on between calls.
2008-07-19 13:21:38 -04:00
Ian Romanick 4d83a751b4 drm-gem: Fix build
On some distros missing prototypes cause kernel builds to fail.  These
are hack to make the code build.
2008-07-18 12:42:43 -07:00
Eric Anholt f5c2f00e2f intel-gem: Leave 8xx tiling on until we find any issues. 2008-07-18 12:10:41 -07:00
Dave Airlie 7cfdba2b30 radeon: remove microcode version 2008-07-18 14:36:47 +10:00
Dave Airlie ed7e170915 drm/radeon: fixup 0 vs NULL 2008-07-18 14:32:46 +10:00
Robert Noland 480c317a6a [FreeBSD] drm_irq.c updates for vblank fixes. 2008-07-17 14:08:06 -04:00
Jesse Barnes a9427cf318 i915: remove old broken vblank code
Remove the unused (and broken) "in vblank" code now that the core has
been fixed to use a counter while interrupts are enabled.  Also make the
vblank pipe get/set ioctls into dumb stub functions, since with the new
code we can no longer let userspace control whether vblank interrupts
are enabled, or the core code will misbehave.
2008-07-17 13:55:24 -04:00
Jesse Barnes 2204f926ab Avoid incorrect vblank wakeups
The current code uses the hw vblank counter exclusively, which can lead
to wakeups during the active period rather than during the vblank period
if the hw counter counts displayed frames rather than vblank periods.

This change coverts the code over to using the counter while interrupts
are enabled, fixing that issue.  It also includes a couple of related
changes:  one to not enable the new enable/disable behavior until the
modeset ioctl is called (to preserve old client behavior) and another to
account for lost events due to mode setting with the new counter scheme.

BSD will require similar changes to its drm_irq.c code, but they should
be straightforward.
2008-07-17 13:55:24 -04:00
Robert Noland b0e4619a39 FreeBSD: Fix radeon build 2008-07-16 23:39:25 -04:00
Owain Gordon Ainsworth 74cf1f91be BSD: change drm_locked_task*() to use the same scheme as linux.
The current code can sleep in an interrupt handler, that is bad. So
instead if we can't grab the lock, flag it and run the tasklet on
unlock.

Signed-off-by: Robert Noland <rnoland@2hip.net>
2008-07-16 21:37:39 -04:00
Robert Noland 96580f660e [FreeBSD] We aren't allowed to hold locks over bus_dma_tag_create or bus_dmamem_alloc. 2008-07-15 16:53:54 -04:00
Hong Liu dfd441cf96 This is a modified version of Hong's patch from last month, with a few
modifications to make it work correctly on my test hardware (altered the
backlight write function, made it enable the legacy backlight controller
interrupts on mobile hardware, sorted the interrupt function so we don't
get an excessive number of vblank interrupts). This lets the backlight
keys on my T61 work properly, though there's a 750msec or so delay
between the request and the brightness actually changing - this sounds
awfully like the hardware spinning waiting for a status flag to become
ready, but as far as I can tell they're all set correctly. If anyone can
figure out what's wrong here, it'd be nice to know.

Some of the functions are still stubs and just tell the hardware that
the request was successful. These can be filled in as kernel modesetting
gets integrated. I think it's worth getting this in anyway, since it's
required for backlight control to work properly on some new platforms.

Signed-off-by: Matthew Garrett <mjg@redhat.com>
2008-07-15 10:14:17 -07:00
Dave Airlie 764573f3b8 drm: fix missing symbol export 2008-07-15 20:27:14 +10:00
Dave Airlie abdd523c75 drm: add fix for PAT on radeon with 2.6.26 2008-07-15 16:18:22 +10:00
Dave Airlie 76c8e19a29 drm/pcigart: fix warning 2008-07-15 16:18:04 +10:00
Eric Anholt 78f1fc9cbc intel-gem: Disable tiling if we get junk from the MCHBAR read.
One of our systems has been returning 0xffffffff from all MCHBAR reads, which
means we'll need to figure out why, or add an alternate detection method.
2008-07-14 09:16:45 -07:00
Eric Anholt a0474be4e7 intel-gem: Add two new ioctls for managing tiling on objects.
Various chips have exciting interactions between the CPU and the GPU's
different ways of accessing interleaved memory, so we need some kernel
assistance in determining how it works.

Only fully tested on GM965 so far.
2008-07-11 18:58:02 -07:00
martin capitanio eac0933be7 xgi: use true/false instead of TRUE/FALSE 2008-07-08 17:58:10 +10:00
Ben Skeggs c7ed2c6791 nouveau: interface changes for nv5x 3d 2008-07-08 12:35:50 +10:00
Eric Anholt 1f9a5307ac [intel-gem] typo fix in DRM_ERROR 2008-07-07 12:49:01 -07:00
Zhenyu Wang 401f77a2ef i915: official name for GM45 chipset
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-07-03 00:49:51 +08:00
Jesse Barnes 301d984ea8 i915: only use tiled blits on 965+
When scheduled swaps occur, we need to blit between front & back buffers.  I
the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit,
only on 965 chips, since it will cause corruption on pre-965 (e.g. 945).

Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01 16:10:01 -07:00