Commit Graph

2105 Commits (d313108167a793652a5fe4c1015198e0a9deac4c)

Author SHA1 Message Date
Jesse Barnes d313108167 Merge branch 'modesetting-gem' of ssh://git.freedesktop.org/git/mesa/drm into modesetting-gem 2008-08-16 11:45:53 -07:00
Jesse Barnes 893315d49e i915: set domain properly on fb mapping, flush out changes
The user visible ioctl does this, but since we call into GEM internals
directly, we have to flush things ourselves.  Fixes initial fb console
corruption.
2008-08-16 11:35:10 -07:00
Dave Airlie 2030db7532 radeon: reserve 64k of VRAM for now for text mode so we don't trample it
need to revisit this later I'm sure
2008-08-15 09:56:42 +10:00
Dave Airlie e0bbd04eb0 radeon: fix LVDS modes problem 2008-08-15 09:42:06 +10:00
Dave Airlie 30ff279e42 radeon: add support for memory map init 2008-08-14 14:43:51 +10:00
Jesse Barnes 5f9e4a764a i915: update cursor handling to use GEM objects 2008-08-13 16:57:42 -07:00
Dave Airlie 2d4420c666 Merge branch 'radeon-gem-cs' into modesetting-gem
Conflicts:

	libdrm/xf86drm.c
	linux-core/Makefile.kernel
	linux-core/drmP.h
	linux-core/drm_compat.h
	linux-core/drm_drv.c
	linux-core/drm_stub.c
	linux-core/drm_vm.c
	shared-core/i915_dma.c
	shared-core/r300_cmdbuf.c
	shared-core/radeon_drv.h
2008-08-14 09:36:34 +10:00
Alex Deucher 2a65759d15 Add com bios asic init bits 2008-08-14 09:19:03 +10:00
Alex Deucher f38fff5416 Fill in and make use of more com bios tables on legacy chips 2008-08-14 09:19:03 +10:00
Alex Deucher 9b79d356c1 Add additional quirks from ddx 2008-08-14 09:19:03 +10:00
Alex Deucher a1f1202470 Fix warnings 2008-08-14 09:19:03 +10:00
Alex Deucher b486ed7f7d Get legacy working finally
- extra ~ in RADEON_WRITE_P()
- re-arrange crtc setup a bit
- add debugging for tracing calls
- fix pitch calculation
2008-08-14 09:19:03 +10:00
Alex Deucher 8867eca872 set base in legacy crtc mode set 2008-08-14 09:19:03 +10:00
Alex Deucher ae89ced7de Convert COM BIOS to table offset lookup function 2008-08-14 09:19:03 +10:00
Alex Deucher 5af426a2b2 Restructure cursor handling and add support for legacy cursors 2008-08-14 09:19:03 +10:00
Alex Deucher f2351ab38c atom: implement crtc lock 2008-08-14 09:19:03 +10:00
Alex Deucher e20c670a5a LUT updates
- Add gamma set for legacy chips
- Add 16 bpp gamma set
2008-08-14 09:19:03 +10:00
Alex Deucher d4f9eaa55a various cleanups
- white space
- move i2c_lock to radeon_i2c.c
- enable tv dac on legacy
2008-08-14 09:19:03 +10:00
Alex Deucher 019745c417 Add legacy dac detect stubs 2008-08-14 09:19:03 +10:00
Alex Deucher b6f5b8ec71 unify connector, i2c handling for atom and legacy 2008-08-14 09:19:02 +10:00
Alex Deucher 5f427e9aae Brute force port of legacy crtc/encoder code
- removed save/init/restore chain with set functions
2008-08-14 09:19:02 +10:00
Alex Deucher 7677c2dba5 on_each_cpu() compat fixup from krh 2008-08-14 09:19:02 +10:00
Dave Airlie 0580785030 radeon: FEDORA: patch to make 3D driver work
set gart buffers start
2008-08-14 09:15:28 +10:00
Dave Airlie 58df2fa0ec radeon: remove debugging 2008-08-14 09:14:56 +10:00
Dave Airlie b0ee12e6bb radeon: use mm_enabled variable to denote memory manager running 2008-08-14 09:14:14 +10:00
Dave Airlie 18020e5e96 radeon: make buffer swap for older drivers work again on GEM 2008-08-14 09:12:36 +10:00
Dave Airlie 957c71ff52 radeon: FEDORA: add old DMA buffers on top of GEM
This really shouldn't go upstream, it just lets me
run the old 3D driver on GEM setup system
2008-08-14 09:10:11 +10:00
Jesse Barnes b8724ae647 Merge branch 'modesetting-101' into modesetting-gem 2008-08-13 10:09:41 -07:00
Jesse Barnes 2f03ba4aad Merge branch 'master' into modesetting-gem
Conflicts:

	libdrm/Makefile.am
	libdrm/xf86drm.h
	shared-core/i915_dma.c
	shared-core/i915_irq.c
2008-08-13 10:08:02 -07:00
Jesse Barnes 085df6491e Add error checking to framebuffer creation
Make the Intel routine return an error if needed and make the core check for
it.
2008-08-12 18:23:58 -07:00
Dave Airlie 08faab27e5 drm_vm: fix for build on 2.6.22
thanks to malc0 for pointing it out
2008-08-11 10:58:41 +10:00
Dave Airlie 280d415957 drm: add OS_HAS_GEM option.
To build i915 driver pass OS_HAS_GEM=1 to make for now
2008-08-11 10:47:00 +10:00
Maarten Maathuis f79ed55462 NV50: enable hotplug irq 2008-08-09 19:47:06 +02:00
Maarten Maathuis 2b7feebb8a NV50: call drm_sysfs_hotplug_event when appropriate 2008-08-09 19:33:32 +02:00
Dave Airlie 12e6a114cf drm: TRUE/true 2008-08-09 17:19:16 +10:00
Eric Anholt e1b8e79796 Merge branch 'drm-gem'
Conflicts:

	shared-core/i915_dma.c

This brings in kernel support and userland interface for intel GEM.
2008-08-08 14:05:01 -07:00
Dave Airlie c2184e450e radeon: add initial support for legacy crtc/encoders.
not all there yet
2008-08-08 16:04:45 +10:00
Jesse Barnes 8074b2e83d Make modesetting-gem build with recent kernels
Needed to merge in VM fault changes & pci_read_base API update.
2008-08-07 17:15:50 -07:00
Jesse Barnes c7fb19e9b0 Merge branch 'drm-gem' into modesetting-gem 2008-08-07 14:02:04 -07:00
Keith Packard ac20e14d23 Switch from shmem_getpage to read_mapping_page 2008-08-06 10:11:11 -07:00
Dave Airlie 8c042a0b05 radeon: fixup PCI GART table with GEM enabled 2008-08-06 15:59:31 +10:00
Dave Airlie 6435958673 radeon: just evict to TT not cached 2008-08-06 15:58:09 +10:00
Dave Airlie a6c075fca6 drm: don't teardown things in modeset paths 2008-08-06 15:57:38 +10:00
Dave Airlie 04b5584c62 pcigart: fixup memset + remove wbinvd 2008-08-06 15:56:08 +10:00
Keith Packard dc0546c87f [gem-intel] Retiring flush requests should clear flushed write_domains
When i915_gem_retire_request has a flush which matches an object write
domain, clear the write domain. This will move the object to the inactive
list rather than the flushing list, avoiding trouble with objects left stuck
on the flushing list.
2008-08-05 16:06:40 -07:00
Keith Packard ceb3d5e383 [gem-intel] Don't clear write_domain until flush completes
In i915_gem_object_wait_rendering, if the object write domain is being
written by the GPU, the appropriate flushing commands are written to the
device and an additional request queued to mark that flush. Finally, the
function blocks on that new request.

The bug was that the write_domain in the object was cleared before the
function blocked.

If the wait is interrupted by a signal, the flushing commands may still be
pending. With the current write_domain information lost, the restarted
syscall will drop right through the write_domain test as that value was
lost, and so the function will not block at all. Oops.

Fixed by simply moving the write_domain clear until after the wait_request
succeeds. Note that the restarted system call will generate an additional
flush sequence and request, but that should be 'harmless', aside from a
slight performance impact.

Someday we'll track flushing more accurately and clear write_domains more
efficiently, but for now, this should suffice.

This bug was discovered in the 2d gem development by running x11perf
-copypixwin500 and noticing that the window got cleared accidentally.
2008-08-05 14:44:53 -07:00
Dave Airlie 4748fbcbd7 radeon: fix blit due to registers wrong 2008-08-05 11:36:37 +10:00
Dave Airlie fd75c02ddd drm: finish bo after lastclose 2008-08-04 14:59:49 +10:00
Dave Airlie 29649ddede radeon: don't use ring if cp not going 2008-08-04 14:56:08 +10:00
Dave Airlie 717dd804d0 drm: fixup master code to use krefs 2008-08-04 14:54:32 +10:00