It's usage in mesa was removed more than two years ago. And it stands
in the way of some optimizations needed to reduce the overhead of hw
stateobjs (ie. CP_SET_DRAW_STATE, where the # of cmds in the submit
ioctl goes up significantly).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
For now, we want a way for gallium to be able to provide hints for the
upcoming rb suballocation. But could be useful for other things down
the road.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Add new API for reusable "state objects" which can be re-used multiple
times. Backend implementation for msm will follow. (Probably not
needed to support this for any device that uses kgsl backend, since this
is mostly useful for a5xx+.)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
In mesa/gallium, a pipe_fence can outlive the pipe_context it was
created from. But to wait on the fence we need to know the submit-
queue (ie. the fd_pipe).
The most straightforward way to fix this is to add reference counting
to the fd_pipe and let the fence hold a reference to the pipe (rather
than hanging on to the context, which might have been destroyed before
the fence).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
This will prevent any more missing `#include "config.h"` bug, at the
cost of having to recompile some files that didn't need to be when
changing build options.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Needed for clover/OpenCL. Fortunately the kernel interface is already
in place.
Include a stub _put_iova() so mesa can tell us when it no longer needs
the buffer to be pinned. There is no kernel interface for this (yet),
but at least if we want to unpin buffers we won't need mesa changes.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
In case of a kernel that is new enough to support multiple submit-
queues, but with an adreno generation which doesn't support multiple
prioritized ringbuffers, we'd attempt to open a submit-queue with
prio=1 (medium), which is rejected by the kernel.
This could happen either w/ an older mesa (which uses fd_pipe_new())
or a newer mesa which defaults to prio=1 if no pipe context priority
flags are set.
The simple answer to fix both cases is to clamp the requested priority
according to the number of rings. This might not do exactly what you
want, if we hypothetically had 2 rings (it would result in requested
medium priority being high priority instead of low priority). But the
number of rings (for hw gen's that support this) is purely a software
construct, so the easy answer there is to have the kernel advertise at
least 3 rings if it supports more than one. There isn't really any
reason to do otherwise.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
With a new-enough kernel to support prioritized submit-queues, we can
expose priority level support to mesa. Open a submit queue associated
with the fd_pipe and pass it's id back to SUBMIT ioctl.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
a5xx and later are 64bit devices.. make reloc's handle that. A new
public symbol is introduced to avoid silent problems with new mesa and
old libdrm (since on 64b reloc consumes two dwords).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
The normal bo cache uses some intermediate steps between power of two
jumps to reduce memory wastage. But for a ringbuffer bo cache, we do
not need this.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
gallium needs to know if the kernel is new enough to support explicit
fencing, dynamically grown ringbuffers, etc.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
With a new enough drm/msm, we can let the kernel know about buffers that
are in the bo cache, so the kernel can free them under memory pressure.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Split out interface to allocate from and release to bo-cache, and get
rid of direct usage of bucket level API from fd_bo/etc.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Eventually we'll want a separate bo-cache for ringbuffer bo's, since
ringbuffer bo's get vmap'd on the kernel side, it is preferrable to
re-use them as ringbuffers rather than something else. Plus should
help to add madvise support if it is a bit better decoupled from bo
allocation (next patch).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
This is used by radeon and freedreno and will be used
by amdgpu. I looked at switching to libdrm_lists.h,
but it's pretty horrible. E.g., DRMLISTFOREACHENTRYSAFE.
v2: remove missed list.h from tests/radeon/Makefile.am
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
They are less and easier to track than the public ones. The macro
drm_public will be going away by the end of the series.
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Already declared in our public header freedreno_drmif.h
Cc: Rob Clark <robclark@freedesktop.org>
Cc: freedreno@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Need to update timestamp on all ring's associated with a submit (ie.
both the binning pass and main ring). Also, make sure nr_reloc's
in particular gets cleared if the rb is reset.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
There seem to be some cases (I've noticed this switching resolution in
some games, for example) where the fd can get closed() before the device
and all it's bo's are destroyed. Which, if the drm device is opened
again and bo's are allocated with the same handles, results that when
the first pipe_screen/pipe_context is destroyed causes the first dev to
close handles for bo's allocated by the second device.
The easy solution to that is to add a mode where the fd_device creates
it's own private fd (a dup()).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Workloads which create many transient buffers cause significant CPU
overhead in buffer allocation, zeroing, cache maint, and mmap setup.
By caching and re-using existing buffers, the CPU overhead drops
significantly. See:
http://bloggingthemonkey.blogspot.com/2013/09/freedreno-update-moar-fps.html
A simple time based policy is used for purging the cache. Once the
kernel supports it, we could use madvise style API to handle memory
pressure scenarios a bit better.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Otherwise build will fail, as drm/drm.h is not available.
Cc: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Split out common code and backend. Current backend is for 'kgsl'
android driver, but a new backend will provide support for the
upstream msm drm/kms driver.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Due to the evil userspace buffer tracking we have to do, and hacks for
creating GEM buffer from fbdev/scanout, "evil-twin" fd_bo objects are
problematic. So introduce hashtable tracking of bo's and dev's, to
avoid getting duplicate fd_bo ptrs for the same underlying gem object,
in particular when importing via flink name.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Super-cheezy way to synchronization between mesa and ddx.. the
SET_ACTIVE ioctl gives us a way to stash a 32b # w/ a GEM bo, and
GET_BUFINFO gives us a way to retrieve it. We use this to stash
the timestamp of the last ISSUEIBCMDS on the buffer.
To avoid an obscene amount of syscalls, we:
1) Only set the timestamp for buffers w/ an flink name, ie.
only buffers shared across processes. This is enough to
catch the DRI2 buffers.
2) Only set the timestamp for buffers submitted to the 3d ring
and only check the timestamps on buffers submitted to the
2d ring. This should be enough to handle synchronizing of
presentation blit. We could do synchronization in the other
direction too, but that would be problematic if we are using
the 3d ring from DDX, since client side wouldn't know this.
The waiting on timestamp happens before flush, and setting of
timestamp happens after flush. It is transparent to the user
of libdrm_freedreno as all the tracking of buffers happens via
_emit_reloc()..
Signed-off-by: Rob Clark <robclark@freedesktop.org>
The libdrm_freedreno helper layer for use by xf86-video-freedreno,
fdre (freedreno r/e library and tests for driving gpu), and eventual
gallium driver for the Adreno GPU. This uses the msm gpu driver
from QCOM's android kernel tree.
Note that current msm kernel driver is a bit strange. It provides a
DRM interface for GEM, which is basically sufficient to have DRI2
working. But it does not provide KMS. And interface to 2d and 3d
cores is via different other devices (/dev/kgsl-*). This is not
quite how I'd write a DRM driver, but at this stage it is useful for
xf86-video-freedreno and fdre (and eventual gallium driver) to be
able to work on existing kernel driver from QCOM, to allow to
capture cmdstream dumps from the binary blob drivers without having
to reboot. So libdrm_freedreno attempts to hide most of the crazy.
The intention is that when there is a proper kernel driver, it will
be mostly just changes in libdrm_freedreno to adapt the gallium
driver and xf86-video-freedreno (ignoring the fbdev->KMS changes).
So don't look at freedreno as an example of how to write a libdrm
module or a DRM driver.. it is just an attempt to paper over a non-
standard kernel driver architecture.
v1: original
v2: hold ref's to pending bo's (because qcom's kernel driver doesn't),
various bug fixes, add ringbuffer markers so we can emit IB's to
portion of ringbuffer (so that gallium driver can use a single
ringbuffer for both tile cmds and draw cmds.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark
Eric Engestrom
Rob Clark
Emil Velikov
Alex Deucher
Maarten Lankhorst