10 Commits (e9194dd1b068666dd94e73d95dc3cd031a89a6b7)

Author	SHA1	Message	Date
Ben Skeggs	2fd812f8ef	Completely untested NV10/20/30 FIFO context switching changes.	2006-11-14 09:00:31 +11:00
Ben Skeggs	7002082944	Restructure initialisation a bit. ... - Do important card init in firstopen - Give each channel it's own cmdbuf dma object - Move RAMHT config state to the same place as RAMRO/RAMFC - Make sure instance mem for objects is *after* RAM{FC,HT,RO}	2006-11-14 08:11:49 +11:00
Dave Airlie	2dd3c039fd	fixup fifo size so it is page aligned	2006-11-06 11:42:15 +11:00
Ben Skeggs	b5cf0d635c	Remove hack which delays activation of a additional channel. The previously active channel's state is saved to RAMFC before PFIFO gets clobbered.	2006-10-18 02:37:19 +11:00
Ben Skeggs	55de3f763f	Useful output on a FIFO error interrupt.	2006-10-17 23:44:05 +11:00
Ben Skeggs	1943f39d8c	Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup code a bit.	2006-10-17 06:37:40 +11:00
Ben Skeggs	95486bbde0	Some info on NV40's RAMFC	2006-10-17 06:12:18 +11:00
Stephane Marchesin	7ef44b2b8d	Still more work on the context switching code.	2006-10-12 17:31:49 +02:00
Stephane Marchesin	dd473411f8	Context switching work. ... Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet). Removed the PFIFO_REINIT ioctl. I hope it's that a good idea... Requires the upcoming commit to the DDX.	2006-10-11 00:28:15 +02:00
Dave Airlie	fef9b30a2b	initial import of nouveau code from nouveau CVS	2006-08-27 08:55:02 +10:00