cb85630c02
nouveau: bring in new mm api definitions, without the actual mm code
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Use of the new bits is guarded with a mm_enabled=0 hardcode.
2009-02-04 13:22:56 +10:00
854bd8f2ca
nouveau: don't save channel context if it has recently become invalid
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Bug exposed by DDX change d9da090c
2009-01-29 23:59:47 +00:00
408fc85a21
nouveau: no suspend support for nv50+
2009-01-29 23:53:01 +00:00
9583c099b4
Revert "Merge branch 'modesetting-gem'"
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This reverts commit 6656db1055
2008-12-10 15:50:22 -08:00
972f657265
Merge remote branch 'origin/master' into modesetting-gem
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Conflicts:
libdrm/Makefile.am
libdrm/dri_bufmgr.h
linux-core/drm_irq.c
linux-core/drm_sysfs.c
linux-core/drm_ttm.c
shared-core/i915_dma.c
shared-core/i915_irq.c
shared-core/nouveau_drv.h
shared-core/radeon_cp.c
2008-09-30 14:13:49 +10:00
ce84511f4d
nouveau: 8200 cards are 0xA0 family.
2008-09-05 00:17:52 +02:00
0da66c27fa
nouveau: fifo and graphics engine suspend and resume for nv04-nv4x
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Corresponding DDX patch at http://people.freedesktop.org/~stuart/nv0x-nv4x_suspend/
2008-08-19 02:01:14 +01:00
f1fe9178f1
NV50: basic fbcon + misc fixes
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- There is one fb, used for as many outputs as possible.
- Eventually smaller screens will be scaled to see the full console, but for the moment this'll do.
2008-07-02 16:14:48 +02:00
30f153a7c2
nouveau: disable KMS for pre-NV50 even when specifically enabled
2008-06-22 19:31:55 +02:00
473a1997ac
NV50: Initial import of kernel modesetting.
2008-06-22 16:29:00 +02:00
74a9ea896e
drm: fix nouveau warning
2008-05-23 09:40:26 +10:00
f31e04a960
nouveau: NV9x cards exist as well.
2008-04-29 19:34:22 +02:00
562f95ea96
nouveau: fix return from function..
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dude kernel moduless use kernel errors :)
this fixes an oops on init when this codepath hits.
2008-03-31 11:34:48 +10:00
1766e1c07b
nv50: force channel vram access through vm
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If we ever want to be able to use the 3D engine we have no choice. It
appears that the tiling setup (required for 3D on G8x) is in the page tables.
The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.
G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
2008-03-13 00:23:52 +11:00
9a7e45858d
nv40: some more nv67 changes
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With some luck the drm-side will be OK now for this chipset.
2008-01-30 11:50:17 +11:00
616cef5ec8
nouveau: don't forget NV80.
2008-01-21 21:11:47 +01:00
641c9a2ecc
nouveau: new card family for old card designs.
2008-01-21 21:01:28 +01:00
3d248cd7e4
nv50: hook up timer funcs...
2008-01-07 17:23:31 +11:00
cd19dcef4f
Nouveau: ppc oops.
2008-01-07 06:11:33 +01:00
de522ae742
Nouveau: move PPC bios copy to firstopen.
2008-01-07 05:54:37 +01:00
887b920a7f
nouveau: Properly identify NV40 and NV44 generation.
2007-11-30 22:50:34 +01:00
307fc3c92c
nouveau: also mention the number of succcessfully copied bios bytes.
2007-11-16 15:02:47 +01:00
baf5d20297
nouveau: be verbose about PPC bios for now.
2007-11-15 20:42:38 +01:00
3c998d8fcb
nouveau: use get_property instead of of_get_property on pre-2.6.22 kernels.
2007-11-15 16:00:54 +01:00
2cf7ad0d9b
nouveau: Copy the PPC bios to RAMIN on init, that lets us do proper output detection in user space.
2007-11-15 03:44:01 +01:00
7e4bb6099a
Revert "nouveau: stub superioctl"
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This reverts commit 2370ded79b
2007-11-14 05:11:11 +11:00
eb5487b9ca
Merge branch 'fifo-cleanup' into upstream-master
2007-11-14 05:09:07 +11:00
d0904f0f2b
nouveau: funcs to determine active channel on PFIFO.
2007-11-14 03:27:37 +11:00
2370ded79b
nouveau: stub superioctl
2007-11-14 03:00:25 +11:00
7f6bf84c23
drm: remove lots of spurious whitespace.
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Kernel "cleanfile" script run.
2007-11-05 12:42:22 +10:00
9a999e57af
nouveau: crappy ttm mm init, disabled for now.
2007-11-05 01:20:32 +11:00
cc745fcc3a
nouveau: don't touch PMC_BOOT_1 on x86, it seems to be undefined on some early cards.
2007-10-28 01:59:39 +02:00
30353c8efc
nouveau: PPC fixes. These regs are very touchy.
2007-10-14 23:08:36 +02:00
d912709a63
nouveau: PMC_BOOT_1 was not mapped.
2007-10-10 16:41:21 +02:00
9b294bbe0e
nouveau: try to fix big endian.
2007-10-10 01:12:20 +02:00
20928a2f2b
nouveau: A char is signed, so it may overflow for >NV50.
2007-10-07 19:01:58 +02:00
d351601899
nouveau: Remove excess device classes.
2007-10-04 09:46:16 +02:00
b510517d59
nouveau: Switch over to using PMC_BOOT_0 for card detection.
2007-10-04 09:31:46 +02:00
69fcfb413e
nouveau: Fix dereferencing a NULL pointer when erroring out during initialization.
2007-10-01 22:21:23 +02:00
205403aea8
nouveau: nv30 graph function renames, removed nv20_graph.c
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All nv30 functions in nv30_graph.c that can be used on nv20 are renamed
as accordingly. nv20 specific parts from nv20_graph.c are moved into
nv30_graph.c.
2007-09-30 22:16:01 +03:00
dc592c8b7b
nouveau: Make nv20 use the nv30 PGRAPH ctx functions.
2007-09-30 22:16:01 +03:00
69b11f44f0
nouveau: give nv03 the last cut.
2007-08-31 01:40:00 +02:00
02c4e0e757
nouveau/nv40: Fix channel scheduling.
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Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
2007-08-15 01:04:41 +10:00
39907f613b
nouveau: Allow creation of gpuobjs before any other init has taken place.
2007-08-10 13:53:10 +10:00
a4759b8513
nouveau : fix enable irq (in the previous code all irq were masked by engine
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init after irq_postinstall)
2007-08-07 23:09:44 +02:00
66f5232d93
nouveau: Init global gpuobj list early, unbreaks sgdma code.
2007-08-07 01:52:49 +10:00
cf04641bc6
nouveau: Give DRM its own gpu channel
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If your card doesn't have working context switching, it is now broken.
2007-08-06 22:05:31 +10:00
97770db720
nouveau: Various internal and external API changes
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1. DRM_NOUVEAU_GPUOBJ_FREE
Used to free GPU objects. The obvious usage case is for Gr objects,
but notifiers can also be destroyed in the same way.
GPU objects gain a destructor method and private data fields with
this change, so other specialised cases (like notifiers) can be
implemented on top of gpuobjs.
2. DRM_NOUVEAU_CHANNEL_FREE
3. DRM_NOUVEAU_CARD_INIT
Ideally we'd do init during module load, but this isn't currently
possible. Doing init during firstopen() is bad as X has a love of
opening/closing the DRM many times during startup. Once the
modesetting-101 branch is merged this can go away.
IRQs are enabled in nouveau_card_init() now, rather than having the
X server call drmCtlInstHandler(). We'll need this for when we give
the kernel module its own channel.
4. DRM_NOUVEAU_GETPARAM
Add CHIPSET_ID value, which will return the chipset id derived
from NV_PMC_BOOT_0.
4. Use list_* in a few places, rather than home-brewed stuff.
2007-08-06 21:45:18 +10:00
beaa0c9a28
nouveau: Pass channel struct around instead of channel id.
2007-08-06 03:40:43 +10:00
5b38e13416
Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE.
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The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures. This also means that XFree86 4.2.0 support for i810 DRM
is lost.
2007-07-20 18:16:42 -07:00
Ben Skeggs
Stuart Bennett
Jesse Barnes
Dave Airlie
Stephane Marchesin
root
Maarten Maathuis
Dave Airlie
Pekka Paalanen
Matthieu Castet
Eric Anholt