f24ed2ad6c
Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into modesetting-101
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Conflicts:
linux-core/i915_fence.c
linux-core/via_fence.c
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
2008-02-18 22:35:46 +00:00
5d8c754bc2
[915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)
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Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
2008-02-16 20:14:49 -08:00
2b1c9cd696
i915: initial (and untested) TV out support
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Ported from xf86-video-intel. Still need to tie in TV modes somehow, though
preferably w/o using the properties mechanism.
2008-02-15 16:13:21 -08:00
088b383829
fb: fixup the offset by getting it from the right place
2008-02-15 16:42:44 +10:00
222092a1a8
various fixes from trying to get userspace started
2008-02-15 16:15:04 +10:00
75b01cf996
switch naming to new proposed scheme
2008-02-15 10:04:28 +10:00
f2f8ace3e1
remove drm_minors_limit
2008-02-15 09:57:30 +10:00
a4fc1d7ac6
start moving over to proper hierarchy wrt master accesses
2008-02-13 16:30:15 +10:00
0fbee62ec1
major port of multi-master ideas into modesetting
2008-02-13 15:19:42 +10:00
f276c845bd
drm: re-write minor number allocation to use an idr.
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Fixup the minor number allocation scheme to use an idr and move the control
nodes up higher.
2008-02-13 12:12:52 +10:00
d63b57749f
Restore pipeconf regs unconditionally
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On many chipsets, the checks for DPLL enable or VGA mode will prevent the
pipeconf regs from being restored, which could result in a blank display or X
failing to come back after resume. So restore them unconditionally along with
actually restoring pipe B's palette correctly.
2008-02-07 17:33:28 -08:00
fe83c06861
Revert "DRM_CONTROL_ALLOW logic was reversed"
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This reverts commit 7af1bb874d
2008-02-07 21:18:37 +00:00
8b6c96dedd
i915: save/restore interrupt state
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On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time. So save/restore them properly.
2008-02-07 10:48:08 -08:00
79d6928520
Fix vblank enable/disable callbacks
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There were two problems with the existing callback code: the vblank
enable callback happened multiple times per disable, making drivers more
complex than they had to be, and there was a race between the final
decrement of the vblank usage counter and the next enable call, which
could have resulted in a put->schedule disable->get->enable->disable
sequence, which would be bad.
So add a new vblank_enabled array to track vblank enable on per-pipe
basis, and add a lock to protect it along with the refcount +
enable/disable calls to fix the race.
2008-02-07 10:40:06 -08:00
0618ac8a07
Added kernel part of hotplug ioctl
2008-02-07 19:24:58 +01:00
7af1bb874d
DRM_CONTROL_ALLOW logic was reversed
2008-02-05 15:12:46 +00:00
de0084590b
fix some warnings
2008-02-05 10:11:46 +00:00
5e81a40f3b
build fix for older kernels
2008-02-05 10:11:24 +00:00
f2c706e247
Fix function declaration
2008-02-05 10:11:01 +00:00
7cc825f594
Add missing round_jiffies_relative() for older kernels
2008-02-05 10:10:36 +00:00
76748efae2
i915: Re-report breadcrumbs on poll to the fence manager,
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since a breadcrumb may actually turn up before a corresponding fence object
has been placed on the fence ring.
2008-02-05 10:36:49 +01:00
c9772f8c03
consistency
2008-02-05 09:28:51 +00:00
709aa46293
Remove duplicate
2008-02-05 09:28:32 +00:00
c77b0937f2
Add an fence_class_manager::last_queued_sequence member, since a
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sequence number may actually turn up before the corresponding fence
object has been queued on the ring.
Fence drivers can use this member to determine whether a
sequence number must be re-reported.
2008-01-31 14:11:12 +01:00
f1edb7ad91
Simplify the fencing code and differentiate between flushes and
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waiting types.
Add a "command_stream_barrier" method to the bo driver.
2008-01-30 22:06:02 +01:00
abed099558
Fix for cursor off
2008-01-30 16:16:10 +01:00
01f6afcfea
Fix hibernate save/restore of VGA attribute regs
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In hibernate, we may end up calling the VGA save regs function twice, so we
need to make sure it's idempotent. That means leaving ARX in index mode after
the first save operation. Fixes hibernate on 965.
2008-01-28 21:05:22 -08:00
b9b6f9234d
Misc panning fixes for intel_fb
2008-01-28 22:06:09 +01:00
a2254c5a96
Added cursor support
2008-01-28 03:14:56 +01:00
98361cf28c
if irq already enabled well just keep trucking
2008-01-25 16:34:05 +10:00
e7a41d7f5b
Merge remote branch 'origin/master' into modesetting-101
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Conflicts:
linux-core/drm_bo.c
linux-core/drm_drv.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/radeon_irq.c
2008-01-25 15:27:53 +10:00
bfdddd218e
Fixup modeset ioctl number & typedef usage
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Should be 0x08 rather than 0xa0, and shouldn't use typedefs.
2008-01-24 21:13:33 -08:00
c57f43e3a2
i915/flush: get the ret the right way around
2008-01-23 16:45:09 +10:00
0cd4cbc9a6
Merge branch 'master' into vblank-rework, including mach64 support
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_irq.c
shared-core/radeon_irq.c
shared-core/via_irq.c
Mostly trivial conflicts.
mach64 support from Mathieu Bérard.
2008-01-22 09:42:37 -08:00
fb9ea12438
Made radeon_ms not always compile
2008-01-18 15:00:31 +01:00
c6f175cbea
i915: fix invalid opcode exception on cpus without clflush
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i915_flush_ttm was unconditionally executing a clflush instruction
to (obviously) flush the cache. Instead, check if the cpu supports
clflush, and if not, fall back to calling wbinvd to flush the entire
cache.
Signed-off-by: Kyle McMartin <kmcmartin@redhat.com>
2008-01-17 16:55:44 -08:00
ac6b3780c8
i915: Add chipset id for Intel Integrated Graphics Device
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This adds new chipset id in drm.
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15 13:06:09 -05:00
f1f934c8c9
radeon_ms: add rom parsing & adapt code
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Add rom (only combios for now) parsing and use informations
retrieve instead of hardcoded table. Shuffle code around a
bit.
2008-01-15 14:17:05 +01:00
099e89edf0
Define i915_compat.c upper_32_bits for kernels < 2.6.21
2008-01-15 09:47:04 +01:00
806c1929dc
this is to fix a deadloop in drm hang system issue.
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(1 << bits) is an undefined value when bits == 32.
gcc may generate 1 with this expression
which will lead to an infinite retry loop in
drm_ht_just_insert_please.
Because of the different implement of hash_long,
this issue is more frequenly see on 64 bit system
2008-01-15 09:19:02 +08:00
62df4f0a48
fixup i915 compat resource allocation
2008-01-14 19:38:41 +10:00
e6fc47129f
Fix for X axis panning problem
2008-01-11 17:33:00 +01:00
f07942f74a
Panning now works without modeset
2008-01-11 17:13:48 +01:00
0b69c1d1d6
Added fixed misc framebuffer problems
2008-01-11 02:55:00 +01:00
e04d942ee8
fixup crtcinfo on modes from userspace
2008-01-09 18:11:17 +11:00
8d6e3c208f
allow control getversion
2008-01-09 16:43:51 +11:00
ebbc2e0a2e
add control ioctls
2008-01-09 16:31:37 +11:00
135f51306b
drm: only call suspend/resume on control node
2008-01-09 16:21:56 +11:00
fa5e18679f
nv50: use dummy page in gart tables
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Just to be safe, we don't really know exactly how the tables work yet, so
we can't be certain there's a way to say "page not present".
2008-01-07 17:09:00 +11:00
f5e5e5c0ea
drm: One forgotten rename of 'mask' to 'proposed_flags'.
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Due to commit d1187641d6
2008-01-05 00:42:38 +02:00
Alan Hourihane
Keith Packard
Jesse Barnes
Dave Airlie
Jesse Barnes
Jesse Barnes
Jakob Bornecrantz
Thomas Hellstrom
Jakob Bornecrantz
Dave Airlie
Kyle McMartin
Zhenyu Wang
Jerome Glisse
Zou Nan hai
Ben Skeggs
Pekka Paalanen