444 lines
11 KiB
C
444 lines
11 KiB
C
/*
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* Copyright 2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <stdlib.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#if HAVE_ALLOCA_H
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# include <alloca.h>
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#endif
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#include "CUnit/Basic.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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#include "xf86drm.h"
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#include <pthread.h>
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#define GFX_COMPUTE_NOP 0xffff1000
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static char *sysfs_remove = NULL;
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static bool do_cs;
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CU_BOOL suite_hotunplug_tests_enable(void)
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{
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CU_BOOL enable = CU_TRUE;
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drmDevicePtr device;
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if (drmGetDevice2(drm_amdgpu[0], DRM_DEVICE_GET_PCI_REVISION, &device)) {
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printf("\n\nGPU Failed to get DRM device PCI info!\n");
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return CU_FALSE;
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}
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if (device->bustype != DRM_BUS_PCI) {
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printf("\n\nGPU device is not on PCI bus!\n");
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amdgpu_device_deinitialize(device_handle);
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return CU_FALSE;
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}
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if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle))
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return CU_FALSE;
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/* Latest tested amdgpu version to work with all the tests */
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if (minor_version < 46)
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enable = false;
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if (amdgpu_device_deinitialize(device_handle))
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return CU_FALSE;
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return enable;
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}
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int suite_hotunplug_tests_init(void)
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{
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/* We need to open/close device at each test manually */
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amdgpu_close_devices();
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return CUE_SUCCESS;
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}
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int suite_hotunplug_tests_clean(void)
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{
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return CUE_SUCCESS;
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}
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static int amdgpu_hotunplug_trigger(const char *pathname)
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{
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int fd, len;
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fd = open(pathname, O_WRONLY);
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if (fd < 0)
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return -errno;
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len = write(fd, "1", 1);
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close(fd);
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return len;
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}
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static int amdgpu_hotunplug_setup_test()
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{
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int r;
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char *tmp_str;
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if (amdgpu_open_device_on_test_index(open_render_node) < 0) {
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printf("\n\n Failed to reopen device file!\n");
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return CUE_SINIT_FAILED;
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}
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r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle);
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if (r) {
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if ((r == -EACCES) && (errno == EACCES))
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printf("\n\nError:%s. "
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"Hint:Try to run this test program as root.",
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strerror(errno));
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return CUE_SINIT_FAILED;
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}
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tmp_str = amdgpu_get_device_from_fd(drm_amdgpu[0]);
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if (!tmp_str){
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printf("\n\n Device path not found!\n");
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return CUE_SINIT_FAILED;
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}
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sysfs_remove = realloc(tmp_str, strlen(tmp_str) * 2);
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strcat(sysfs_remove, "/remove");
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return 0;
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}
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static int amdgpu_hotunplug_teardown_test()
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{
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if (amdgpu_device_deinitialize(device_handle))
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return CUE_SCLEAN_FAILED;
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amdgpu_close_devices();
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if (sysfs_remove)
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free(sysfs_remove);
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return 0;
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}
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static inline int amdgpu_hotunplug_remove()
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{
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return amdgpu_hotunplug_trigger(sysfs_remove);
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}
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static inline int amdgpu_hotunplug_rescan()
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{
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return amdgpu_hotunplug_trigger("/sys/bus/pci/rescan");
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}
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static int amdgpu_cs_sync(amdgpu_context_handle context,
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unsigned int ip_type,
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int ring,
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unsigned int seqno)
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{
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struct amdgpu_cs_fence fence = {
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.context = context,
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.ip_type = ip_type,
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.ring = ring,
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.fence = seqno,
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};
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uint32_t expired;
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return amdgpu_cs_query_fence_status(&fence,
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AMDGPU_TIMEOUT_INFINITE,
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0, &expired);
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}
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static void *amdgpu_nop_cs()
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{
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amdgpu_bo_handle ib_result_handle;
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void *ib_result_cpu;
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uint64_t ib_result_mc_address;
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uint32_t *ptr;
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int i, r;
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amdgpu_bo_list_handle bo_list;
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amdgpu_va_handle va_handle;
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amdgpu_context_handle context;
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struct amdgpu_cs_request ibs_request;
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struct amdgpu_cs_ib_info ib_info;
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r = amdgpu_cs_ctx_create(device_handle, &context);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
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AMDGPU_GEM_DOMAIN_GTT, 0,
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&ib_result_handle, &ib_result_cpu,
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&ib_result_mc_address, &va_handle);
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CU_ASSERT_EQUAL(r, 0);
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ptr = ib_result_cpu;
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for (i = 0; i < 16; ++i)
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ptr[i] = GFX_COMPUTE_NOP;
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r = amdgpu_bo_list_create(device_handle, 1, &ib_result_handle, NULL, &bo_list);
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CU_ASSERT_EQUAL(r, 0);
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memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
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ib_info.ib_mc_address = ib_result_mc_address;
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ib_info.size = 16;
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memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
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ibs_request.ip_type = AMDGPU_HW_IP_GFX;
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ibs_request.ring = 0;
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ibs_request.number_of_ibs = 1;
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ibs_request.ibs = &ib_info;
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ibs_request.resources = bo_list;
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while (do_cs)
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amdgpu_cs_submit(context, 0, &ibs_request, 1);
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amdgpu_cs_sync(context, AMDGPU_HW_IP_GFX, 0, ibs_request.seq_no);
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amdgpu_bo_list_destroy(bo_list);
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amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
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ib_result_mc_address, 4096);
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amdgpu_cs_ctx_free(context);
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return (void *)0;
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}
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static pthread_t* amdgpu_create_cs_thread()
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{
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int r;
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pthread_t *thread = malloc(sizeof(*thread));
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if (!thread)
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return NULL;
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do_cs = true;
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r = pthread_create(thread, NULL, amdgpu_nop_cs, NULL);
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CU_ASSERT_EQUAL(r, 0);
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/* Give thread enough time to start*/
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usleep(100000);
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return thread;
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}
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static void amdgpu_destroy_cs_thread(pthread_t *thread)
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{
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void *status;
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do_cs = false;
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pthread_join(*thread, &status);
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CU_ASSERT_EQUAL(status, 0);
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free(thread);
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}
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static void amdgpu_hotunplug_test(bool with_cs)
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{
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int r;
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pthread_t *thread = NULL;
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r = amdgpu_hotunplug_setup_test();
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CU_ASSERT_EQUAL(r , 0);
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if (with_cs) {
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thread = amdgpu_create_cs_thread();
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CU_ASSERT_NOT_EQUAL(thread, NULL);
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}
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r = amdgpu_hotunplug_remove();
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CU_ASSERT_EQUAL(r > 0, 1);
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if (with_cs)
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amdgpu_destroy_cs_thread(thread);
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r = amdgpu_hotunplug_teardown_test();
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CU_ASSERT_EQUAL(r , 0);
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r = amdgpu_hotunplug_rescan();
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CU_ASSERT_EQUAL(r > 0, 1);
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}
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static void amdgpu_hotunplug_simple(void)
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{
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amdgpu_hotunplug_test(false);
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}
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static void amdgpu_hotunplug_with_cs(void)
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{
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amdgpu_hotunplug_test(true);
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}
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static void amdgpu_hotunplug_with_exported_bo(void)
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{
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int r;
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uint32_t dma_buf_fd;
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unsigned int *ptr;
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amdgpu_bo_handle bo_handle;
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struct amdgpu_bo_alloc_request request = {
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.alloc_size = 4096,
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.phys_alignment = 4096,
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.preferred_heap = AMDGPU_GEM_DOMAIN_GTT,
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.flags = 0,
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};
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r = amdgpu_hotunplug_setup_test();
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CU_ASSERT_EQUAL(r , 0);
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amdgpu_bo_alloc(device_handle, &request, &bo_handle);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_export(bo_handle, amdgpu_bo_handle_type_dma_buf_fd, &dma_buf_fd);
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CU_ASSERT_EQUAL(r, 0);
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ptr = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, dma_buf_fd, 0);
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CU_ASSERT_NOT_EQUAL(ptr, MAP_FAILED);
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r = amdgpu_hotunplug_remove();
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CU_ASSERT_EQUAL(r > 0, 1);
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amdgpu_bo_free(bo_handle);
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r = amdgpu_hotunplug_teardown_test();
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CU_ASSERT_EQUAL(r , 0);
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*ptr = 0xdeafbeef;
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munmap(ptr, 4096);
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close (dma_buf_fd);
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r = amdgpu_hotunplug_rescan();
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CU_ASSERT_EQUAL(r > 0, 1);
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}
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static void amdgpu_hotunplug_with_exported_fence(void)
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{
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amdgpu_bo_handle ib_result_handle;
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void *ib_result_cpu;
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uint64_t ib_result_mc_address;
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uint32_t *ptr, sync_obj_handle, sync_obj_handle2;
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int i, r;
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amdgpu_bo_list_handle bo_list;
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amdgpu_va_handle va_handle;
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uint32_t major2, minor2;
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amdgpu_device_handle device2;
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amdgpu_context_handle context;
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struct amdgpu_cs_request ibs_request;
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struct amdgpu_cs_ib_info ib_info;
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struct amdgpu_cs_fence fence_status = {0};
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int shared_fd;
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r = amdgpu_hotunplug_setup_test();
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CU_ASSERT_EQUAL(r , 0);
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r = amdgpu_device_initialize(drm_amdgpu[1], &major2, &minor2, &device2);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_cs_ctx_create(device_handle, &context);
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CU_ASSERT_EQUAL(r, 0);
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r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096,
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AMDGPU_GEM_DOMAIN_GTT, 0,
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&ib_result_handle, &ib_result_cpu,
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&ib_result_mc_address, &va_handle);
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CU_ASSERT_EQUAL(r, 0);
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ptr = ib_result_cpu;
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for (i = 0; i < 16; ++i)
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ptr[i] = GFX_COMPUTE_NOP;
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r = amdgpu_bo_list_create(device_handle, 1, &ib_result_handle, NULL, &bo_list);
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CU_ASSERT_EQUAL(r, 0);
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memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
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ib_info.ib_mc_address = ib_result_mc_address;
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ib_info.size = 16;
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memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
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ibs_request.ip_type = AMDGPU_HW_IP_GFX;
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ibs_request.ring = 0;
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ibs_request.number_of_ibs = 1;
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ibs_request.ibs = &ib_info;
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ibs_request.resources = bo_list;
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CU_ASSERT_EQUAL(amdgpu_cs_submit(context, 0, &ibs_request, 1), 0);
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fence_status.context = context;
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fence_status.ip_type = AMDGPU_HW_IP_GFX;
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fence_status.ip_instance = 0;
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fence_status.fence = ibs_request.seq_no;
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CU_ASSERT_EQUAL(amdgpu_cs_fence_to_handle(device_handle, &fence_status,
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AMDGPU_FENCE_TO_HANDLE_GET_SYNCOBJ,
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&sync_obj_handle),
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0);
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CU_ASSERT_EQUAL(amdgpu_cs_export_syncobj(device_handle, sync_obj_handle, &shared_fd), 0);
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CU_ASSERT_EQUAL(amdgpu_cs_import_syncobj(device2, shared_fd, &sync_obj_handle2), 0);
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CU_ASSERT_EQUAL(amdgpu_cs_destroy_syncobj(device_handle, sync_obj_handle), 0);
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CU_ASSERT_EQUAL(amdgpu_bo_list_destroy(bo_list), 0);
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CU_ASSERT_EQUAL(amdgpu_bo_unmap_and_free(ib_result_handle, va_handle,
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ib_result_mc_address, 4096), 0);
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CU_ASSERT_EQUAL(amdgpu_cs_ctx_free(context), 0);
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r = amdgpu_hotunplug_remove();
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CU_ASSERT_EQUAL(r > 0, 1);
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CU_ASSERT_EQUAL(amdgpu_cs_syncobj_wait(device2, &sync_obj_handle2, 1, 100000000, 0, NULL), 0);
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CU_ASSERT_EQUAL(amdgpu_cs_destroy_syncobj(device2, sync_obj_handle2), 0);
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amdgpu_device_deinitialize(device2);
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r = amdgpu_hotunplug_teardown_test();
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CU_ASSERT_EQUAL(r , 0);
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r = amdgpu_hotunplug_rescan();
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CU_ASSERT_EQUAL(r > 0, 1);
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}
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CU_TestInfo hotunplug_tests[] = {
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{ "Unplug card and rescan the bus to plug it back", amdgpu_hotunplug_simple },
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{ "Same as first test but with command submission", amdgpu_hotunplug_with_cs },
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{ "Unplug with exported bo", amdgpu_hotunplug_with_exported_bo },
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{ "Unplug with exported fence", amdgpu_hotunplug_with_exported_fence },
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CU_TEST_INFO_NULL,
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};
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