342 lines
9.4 KiB
C
342 lines
9.4 KiB
C
/*
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* Copyright 2007 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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#include "radeon_ms.h"
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#include "amd.h"
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static void radeon_ms_execbuffer_args_clean(struct drm_device *dev,
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struct amd_cbuffer *cbuffer,
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uint32_t args_count)
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{
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mutex_lock(&dev->struct_mutex);
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while (args_count--) {
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drm_bo_usage_deref_locked(&cbuffer->args[args_count].buffer);
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}
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mutex_unlock(&dev->struct_mutex);
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}
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static int radeon_ms_execbuffer_args(struct drm_device *dev,
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struct drm_file *file_priv,
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struct drm_radeon_execbuffer *execbuffer,
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struct amd_cbuffer *cbuffer)
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{
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struct drm_radeon_execbuffer_arg arg;
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struct drm_bo_arg_rep rep;
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uint32_t args_count = 0;
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uint64_t next = 0;
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uint64_t data = execbuffer->args;
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int ret = 0;
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do {
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if (args_count >= execbuffer->args_count) {
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DRM_ERROR("[radeon_ms] buffer count exceeded %d\n.",
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execbuffer->args_count);
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ret = -EINVAL;
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goto out_err;
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}
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INIT_LIST_HEAD(&cbuffer->args[args_count].list);
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cbuffer->args[args_count].buffer = NULL;
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if (copy_from_user(&arg, (void __user *)((unsigned)data),
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sizeof(struct drm_radeon_execbuffer_arg))) {
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ret = -EFAULT;
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goto out_err;
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}
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mutex_lock(&dev->struct_mutex);
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cbuffer->args[args_count].buffer =
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drm_lookup_buffer_object(file_priv,
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arg.d.req.arg_handle, 1);
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cbuffer->args[args_count].dw_id = arg.reloc_offset;
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mutex_unlock(&dev->struct_mutex);
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if (arg.d.req.op != drm_bo_validate) {
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DRM_ERROR("[radeon_ms] buffer object operation wasn't "
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"validate.\n");
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ret = -EINVAL;
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goto out_err;
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}
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memset(&rep, 0, sizeof(struct drm_bo_arg_rep));
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ret = drm_bo_handle_validate(file_priv,
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arg.d.req.bo_req.handle,
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arg.d.req.bo_req.flags,
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arg.d.req.bo_req.mask,
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arg.d.req.bo_req.hint,
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arg.d.req.bo_req.fence_class,
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0,
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&rep.bo_info,
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&cbuffer->args[args_count].buffer);
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if (ret) {
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DRM_ERROR("[radeon_ms] error on handle validate %d\n",
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ret);
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rep.ret = ret;
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goto out_err;
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}
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next = arg.next;
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arg.d.rep = rep;
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if (copy_to_user((void __user *)((unsigned)data), &arg,
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sizeof(struct drm_radeon_execbuffer_arg))) {
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ret = -EFAULT;
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goto out_err;
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}
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data = next;
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list_add_tail(&cbuffer->args[args_count].list,
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&cbuffer->arg_unused.list);
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args_count++;
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} while (next != 0);
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if (args_count != execbuffer->args_count) {
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DRM_ERROR("[radeon_ms] not enought buffer got %d waited %d\n.",
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args_count, execbuffer->args_count);
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ret = -EINVAL;
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goto out_err;
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}
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return 0;
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out_err:
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radeon_ms_execbuffer_args_clean(dev, cbuffer, args_count);
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return ret;
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}
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static int cbuffer_packet0_check(struct drm_device *dev,
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struct amd_cbuffer *cbuffer,
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int dw_id)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t reg, count, r, i;
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int ret;
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reg = cbuffer->cbuffer[dw_id] & PACKET0_REG_MASK;
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count = (cbuffer->cbuffer[dw_id] & PACKET0_COUNT_MASK) >>
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PACKET0_COUNT_SHIFT;
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if (reg + count > dev_priv->cbuffer_checker.numof_p0_checkers) {
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return -EINVAL;
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}
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for (r = reg, i = 0; i <= count; i++, r++) {
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if (dev_priv->cbuffer_checker.check_p0[r] == NULL) {
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continue;
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}
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if (dev_priv->cbuffer_checker.check_p0[r] == (void *)-1) {
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DRM_INFO("[radeon_ms] check_f: %d %d -1 checker\n",
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r, r << 2);
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return -EINVAL;
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}
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ret = dev_priv->cbuffer_checker.check_p0[r](dev, cbuffer,
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dw_id + i + 1, reg);
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if (ret) {
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DRM_INFO("[radeon_ms] check_f: %d %d checker ret=%d\n",
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r, r << 2, ret);
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return -EINVAL;
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}
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}
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/* header + N + 1 dword passed test */
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return count + 2;
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}
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static int cbuffer_packet3_check(struct drm_device *dev,
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struct amd_cbuffer *cbuffer,
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int dw_id)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t opcode, count;
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int ret;
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opcode = (cbuffer->cbuffer[dw_id] & PACKET3_OPCODE_MASK) >>
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PACKET3_OPCODE_SHIFT;
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if (opcode > dev_priv->cbuffer_checker.numof_p3_checkers) {
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return -EINVAL;
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}
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count = (cbuffer->cbuffer[dw_id] & PACKET3_COUNT_MASK) >>
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PACKET3_COUNT_SHIFT;
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if (dev_priv->cbuffer_checker.check_p3[opcode] == NULL) {
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return -EINVAL;
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}
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ret = dev_priv->cbuffer_checker.check_p3[opcode](dev, cbuffer,
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dw_id + 1, opcode,
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count);
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if (ret) {
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return -EINVAL;
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}
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return count + 2;
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}
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int amd_cbuffer_check(struct drm_device *dev, struct amd_cbuffer *cbuffer)
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{
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uint32_t i;
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int ret;
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for (i = 0; i < cbuffer->cbuffer_dw_count;) {
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switch (PACKET_HEADER_GET(cbuffer->cbuffer[i])) {
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case 0:
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ret = cbuffer_packet0_check(dev, cbuffer, i);
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if (ret <= 0) {
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return ret;
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}
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/* advance to next packet */
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i += ret;
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break;
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case 1:
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/* we don't accept packet 1 */
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return -EINVAL;
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case 2:
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/* FIXME: accept packet 2 */
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return -EINVAL;
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case 3:
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ret = cbuffer_packet3_check(dev, cbuffer, i);
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if (ret <= 0) {
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return ret;
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}
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/* advance to next packet */
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i += ret;
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break;
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}
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}
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return 0;
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}
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struct amd_cbuffer_arg *
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amd_cbuffer_arg_from_dw_id(struct amd_cbuffer_arg *head, uint32_t dw_id)
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{
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struct amd_cbuffer_arg *arg;
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list_for_each_entry(arg, &head->list, list) {
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if (arg->dw_id == dw_id) {
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return arg;
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}
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}
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/* no buffer at this dw index */
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return NULL;
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}
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int radeon_ms_execbuffer(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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struct drm_radeon_execbuffer *execbuffer = data;
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struct drm_fence_arg *fence_arg = &execbuffer->fence_arg;
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struct drm_bo_kmap_obj cmd_kmap;
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struct drm_fence_object *fence;
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int cmd_is_iomem;
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int ret = 0;
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struct amd_cbuffer cbuffer;
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/* command buffer dword count must be >= 0 */
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if (execbuffer->cmd_size < 0) {
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return -EINVAL;
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}
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/* FIXME: Lock buffer manager, is this really needed ?
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*/
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ret = drm_bo_read_lock(&dev->bm.bm_lock);
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if (ret) {
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return ret;
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}
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cbuffer.args = drm_calloc(execbuffer->args_count,
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sizeof(struct amd_cbuffer_arg),
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DRM_MEM_DRIVER);
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if (cbuffer.args == NULL) {
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ret = -ENOMEM;
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goto out_free;
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}
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INIT_LIST_HEAD(&cbuffer.arg_unused.list);
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INIT_LIST_HEAD(&cbuffer.arg_used.list);
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/* process arguments */
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ret = radeon_ms_execbuffer_args(dev, file_priv, execbuffer, &cbuffer);
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if (ret) {
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DRM_ERROR("[radeon_ms] execbuffer wrong arguments\n");
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goto out_free;
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}
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/* map command buffer */
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cbuffer.cbuffer_dw_count = (cbuffer.args[0].buffer->mem.num_pages *
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PAGE_SIZE) >> 2;
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if (execbuffer->cmd_size > cbuffer.cbuffer_dw_count) {
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ret = -EINVAL;
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goto out_free_release;
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}
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cbuffer.cbuffer_dw_count = execbuffer->cmd_size;
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memset(&cmd_kmap, 0, sizeof(struct drm_bo_kmap_obj));
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ret = drm_bo_kmap(cbuffer.args[0].buffer, 0,
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cbuffer.args[0].buffer->mem.num_pages, &cmd_kmap);
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if (ret) {
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DRM_ERROR("[radeon_ms] error mapping ring buffer: %d\n", ret);
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goto out_free_release;
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}
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cbuffer.cbuffer = drm_bmo_virtual(&cmd_kmap, &cmd_is_iomem);
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list_del(&cbuffer.args[0].list);
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list_add_tail(&cbuffer.args[0].list , &cbuffer.arg_used.list);
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/* do cmd checking & relocations */
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if (dev_priv->cbuffer_checker.check) {
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ret = dev_priv->cbuffer_checker.check(dev, &cbuffer);
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if (ret) {
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drm_putback_buffer_objects(dev);
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goto out_free_release;
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}
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} else {
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drm_putback_buffer_objects(dev);
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goto out_free_release;
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}
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ret = radeon_ms_ring_emit(dev, cbuffer.cbuffer,
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cbuffer.cbuffer_dw_count);
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if (ret) {
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drm_putback_buffer_objects(dev);
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goto out_free_release;
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}
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/* fence */
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ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
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if (ret) {
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drm_putback_buffer_objects(dev);
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DRM_ERROR("[radeon_ms] fence buffer objects failed\n");
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goto out_free_release;
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}
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if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
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ret = drm_fence_add_user_object(file_priv, fence,
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fence_arg->flags &
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DRM_FENCE_FLAG_SHAREABLE);
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if (!ret) {
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fence_arg->handle = fence->base.hash.key;
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fence_arg->fence_class = fence->fence_class;
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fence_arg->type = fence->type;
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fence_arg->signaled = fence->signaled_types;
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fence_arg->sequence = fence->sequence;
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}
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}
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drm_fence_usage_deref_unlocked(&fence);
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out_free_release:
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drm_bo_kunmap(&cmd_kmap);
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radeon_ms_execbuffer_args_clean(dev, &cbuffer, execbuffer->args_count);
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out_free:
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drm_free(cbuffer.args,
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(execbuffer->args_count * sizeof(struct amd_cbuffer_arg)),
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DRM_MEM_DRIVER);
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drm_bo_read_unlock(&dev->bm.bm_lock);
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return ret;
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}
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