143 lines
4.3 KiB
C
143 lines
4.3 KiB
C
/*
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* Copyright 2007 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_ms.h"
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extern const uint32_t radeon_cp_microcode[];
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extern const uint32_t r200_cp_microcode[];
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extern const uint32_t r300_cp_microcode[];
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static void radeon_flush_cache(struct drm_device *dev)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t cmd[6];
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int i, ret;
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cmd[0] = CP_PACKET0(RB2D_DSTCACHE_CTLSTAT, 0);
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cmd[1] = REG_S(RB2D_DSTCACHE_CTLSTAT, DC_FLUSH, 3);
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cmd[2] = CP_PACKET0(RB3D_DSTCACHE_CTLSTAT, 0);
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cmd[3] = REG_S(RB3D_DSTCACHE_CTLSTAT, DC_FLUSH, 3);
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cmd[4] = CP_PACKET0(RB3D_ZCACHE_CTLSTAT, 0);
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cmd[5] = RB3D_ZCACHE_CTLSTAT__ZC_FLUSH;
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/* try to wait but if we timeout we likely are in bad situation */
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for (i = 0; i < dev_priv->usec_timeout; i++) {
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ret = radeon_ms_ring_emit(dev, cmd, 6);
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if (!ret) {
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break;
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}
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}
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}
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static void r300_flush_cache(struct drm_device *dev)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t cmd[6];
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int i, ret;
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cmd[0] = CP_PACKET0(RB2D_DSTCACHE_CTLSTAT, 0);
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cmd[1] = REG_S(RB2D_DSTCACHE_CTLSTAT, DC_FLUSH, 3);
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cmd[2] = CP_PACKET0(RB3D_DSTCACHE_CTLSTAT_R3, 0);
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cmd[3] = REG_S(RB3D_DSTCACHE_CTLSTAT_R3, DC_FLUSH, 3);
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cmd[4] = CP_PACKET0(RB3D_ZCACHE_CTLSTAT_R3, 0);
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cmd[5] = RB3D_ZCACHE_CTLSTAT_R3__ZC_FLUSH;
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/* try to wait but if we timeout we likely are in bad situation */
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for (i = 0; i < dev_priv->usec_timeout; i++) {
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ret = radeon_ms_ring_emit(dev, cmd, 6);
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if (!ret) {
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break;
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}
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}
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}
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int radeon_ms_family_init(struct drm_device *dev)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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int ret;
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dev_priv->microcode = radeon_cp_microcode;
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dev_priv->irq_emit = radeon_ms_irq_emit;
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switch (dev_priv->family) {
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case CHIP_R100:
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case CHIP_R200:
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dev_priv->microcode = radeon_cp_microcode;
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dev_priv->flush_cache = radeon_flush_cache;
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break;
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case CHIP_RV200:
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case CHIP_RV250:
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case CHIP_RV280:
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case CHIP_RS300:
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dev_priv->microcode = r200_cp_microcode;
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dev_priv->flush_cache = radeon_flush_cache;
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break;
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case CHIP_R300:
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case CHIP_R350:
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case CHIP_R360:
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case CHIP_RV350:
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case CHIP_RV370:
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case CHIP_RV380:
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case CHIP_RS400:
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case CHIP_RV410:
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case CHIP_R420:
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case CHIP_R430:
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case CHIP_R480:
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dev_priv->microcode = r300_cp_microcode;
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dev_priv->flush_cache = r300_flush_cache;
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break;
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default:
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DRM_ERROR("Unknown radeon family, aborting\n");
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return -EINVAL;
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}
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switch (dev_priv->bus_type) {
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case RADEON_AGP:
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dev_priv->create_ttm = drm_agp_init_ttm;
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dev_priv->bus_finish = radeon_ms_agp_finish;
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dev_priv->bus_init = radeon_ms_agp_init;
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dev_priv->bus_restore = radeon_ms_agp_restore;
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dev_priv->bus_save = radeon_ms_agp_save;
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break;
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case RADEON_PCIE:
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dev_priv->create_ttm = radeon_ms_pcie_create_ttm;
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dev_priv->bus_finish = radeon_ms_pcie_finish;
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dev_priv->bus_init = radeon_ms_pcie_init;
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dev_priv->bus_restore = radeon_ms_pcie_restore;
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dev_priv->bus_save = radeon_ms_pcie_save;
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break;
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default:
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DRM_ERROR("Unknown radeon bus type, aborting\n");
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return -EINVAL;
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}
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ret = radeon_ms_rom_init(dev);
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if (ret) {
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return ret;
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}
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ret = radeon_ms_properties_init(dev);
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return ret;
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}
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