274 lines
7.7 KiB
C
274 lines
7.7 KiB
C
/**************************************************************************
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*
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* Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*
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**************************************************************************/
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/*
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* Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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/*
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* Initiate a sync flush if it's not already pending.
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*/
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static inline void i915_initiate_rwflush(struct drm_i915_private *dev_priv,
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struct drm_fence_class_manager *fc)
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{
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if ((fc->pending_flush & DRM_I915_FENCE_TYPE_RW) &&
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!dev_priv->flush_pending) {
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dev_priv->flush_sequence = (uint32_t) READ_BREADCRUMB(dev_priv);
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dev_priv->flush_flags = fc->pending_flush;
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dev_priv->saved_flush_status = READ_HWSP(dev_priv, 0);
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I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
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dev_priv->flush_pending = 1;
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fc->pending_flush &= ~DRM_I915_FENCE_TYPE_RW;
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}
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}
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static inline void i915_report_rwflush(struct drm_device *dev,
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struct drm_i915_private *dev_priv)
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{
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if (unlikely(dev_priv->flush_pending)) {
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uint32_t flush_flags;
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uint32_t i_status;
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uint32_t flush_sequence;
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i_status = READ_HWSP(dev_priv, 0);
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if ((i_status & (1 << 12)) !=
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(dev_priv->saved_flush_status & (1 << 12))) {
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flush_flags = dev_priv->flush_flags;
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flush_sequence = dev_priv->flush_sequence;
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dev_priv->flush_pending = 0;
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drm_fence_handler(dev, 0, flush_sequence,
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flush_flags, 0);
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}
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}
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}
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static void i915_fence_flush(struct drm_device *dev,
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uint32_t fence_class)
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{
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struct drm_i915_private *dev_priv =
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(struct drm_i915_private *) dev->dev_private;
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struct drm_fence_manager *fm = &dev->fm;
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struct drm_fence_class_manager *fc = &fm->fence_class[0];
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unsigned long irq_flags;
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if (unlikely(!dev_priv))
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return;
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write_lock_irqsave(&fm->lock, irq_flags);
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i915_initiate_rwflush(dev_priv, fc);
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write_unlock_irqrestore(&fm->lock, irq_flags);
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}
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static void i915_fence_poll(struct drm_device *dev, uint32_t fence_class,
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uint32_t waiting_types)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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struct drm_fence_manager *fm = &dev->fm;
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struct drm_fence_class_manager *fc = &fm->fence_class[0];
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uint32_t sequence;
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if (unlikely(!dev_priv))
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return;
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/*
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* First, report any executed sync flush:
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*/
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i915_report_rwflush(dev, dev_priv);
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/*
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* Report A new breadcrumb, and adjust IRQs.
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*/
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if (waiting_types & DRM_FENCE_TYPE_EXE) {
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sequence = READ_BREADCRUMB(dev_priv);
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drm_fence_handler(dev, 0, sequence,
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DRM_FENCE_TYPE_EXE, 0);
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if (dev_priv->fence_irq_on &&
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!(fc->waiting_types & DRM_FENCE_TYPE_EXE)) {
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i915_user_irq_off(dev_priv);
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dev_priv->fence_irq_on = 0;
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} else if (!dev_priv->fence_irq_on &&
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(fc->waiting_types & DRM_FENCE_TYPE_EXE)) {
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i915_user_irq_on(dev_priv);
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dev_priv->fence_irq_on = 1;
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}
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}
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/*
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* There may be new RW flushes pending. Start them.
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*/
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i915_initiate_rwflush(dev_priv, fc);
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/*
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* And possibly, but unlikely, they finish immediately.
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*/
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i915_report_rwflush(dev, dev_priv);
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}
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static int i915_fence_emit_sequence(struct drm_device *dev, uint32_t class,
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uint32_t flags, uint32_t *sequence,
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uint32_t *native_type)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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if (unlikely(!dev_priv))
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return -EINVAL;
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i915_emit_irq(dev);
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*sequence = (uint32_t) dev_priv->counter;
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*native_type = DRM_FENCE_TYPE_EXE;
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if (flags & DRM_I915_FENCE_FLAG_FLUSHED)
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*native_type |= DRM_I915_FENCE_TYPE_RW;
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return 0;
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}
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void i915_fence_handler(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
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struct drm_fence_manager *fm = &dev->fm;
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struct drm_fence_class_manager *fc = &fm->fence_class[0];
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write_lock(&fm->lock);
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if (likely(dev_priv->fence_irq_on))
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i915_fence_poll(dev, 0, fc->waiting_types);
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write_unlock(&fm->lock);
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}
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/*
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* We need a separate wait function since we need to poll for
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* sync flushes.
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*/
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static int i915_fence_wait(struct drm_fence_object *fence,
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int lazy, int interruptible, uint32_t mask)
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{
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struct drm_device *dev = fence->dev;
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drm_i915_private_t *dev_priv = (struct drm_i915_private *) dev->dev_private;
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struct drm_fence_manager *fm = &dev->fm;
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struct drm_fence_class_manager *fc = &fm->fence_class[0];
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int ret;
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unsigned long _end = jiffies + 3 * DRM_HZ;
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drm_fence_object_flush(fence, mask);
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if (likely(interruptible))
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ret = wait_event_interruptible_timeout
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(fc->fence_queue, drm_fence_object_signaled(fence, DRM_FENCE_TYPE_EXE),
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3 * DRM_HZ);
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else
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ret = wait_event_timeout
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(fc->fence_queue, drm_fence_object_signaled(fence, DRM_FENCE_TYPE_EXE),
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3 * DRM_HZ);
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if (unlikely(ret == -ERESTARTSYS))
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return -EAGAIN;
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if (unlikely(ret == 0))
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return -EBUSY;
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if (likely(mask == DRM_FENCE_TYPE_EXE ||
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drm_fence_object_signaled(fence, mask)))
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return 0;
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/*
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* Remove this code snippet when fixed. HWSTAM doesn't let
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* flush info through...
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*/
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if (unlikely(dev_priv && !dev_priv->irq_enabled)) {
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unsigned long irq_flags;
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DRM_ERROR("X server disabled IRQs before releasing frame buffer.\n");
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msleep(100);
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dev_priv->flush_pending = 0;
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write_lock_irqsave(&fm->lock, irq_flags);
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drm_fence_handler(dev, fence->fence_class,
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fence->sequence, fence->type, 0);
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write_unlock_irqrestore(&fm->lock, irq_flags);
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}
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/*
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* Poll for sync flush completion.
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*/
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return drm_fence_wait_polling(fence, lazy, interruptible, mask, _end);
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}
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static uint32_t i915_fence_needed_flush(struct drm_fence_object *fence)
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{
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uint32_t flush_flags = fence->waiting_types &
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~(DRM_FENCE_TYPE_EXE | fence->signaled_types);
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if (likely(flush_flags == 0 ||
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((flush_flags & ~fence->native_types) == 0) ||
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(fence->signaled_types != DRM_FENCE_TYPE_EXE)))
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return 0;
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else {
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struct drm_device *dev = fence->dev;
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struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
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struct drm_fence_driver *driver = dev->driver->fence_driver;
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if (unlikely(!dev_priv))
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return 0;
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if (dev_priv->flush_pending) {
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uint32_t diff = (dev_priv->flush_sequence - fence->sequence) &
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driver->sequence_mask;
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if (diff < driver->wrap_diff)
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return 0;
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}
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}
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return flush_flags;
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}
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struct drm_fence_driver i915_fence_driver = {
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.num_classes = 1,
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.wrap_diff = (1U << (BREADCRUMB_BITS - 1)),
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.flush_diff = (1U << (BREADCRUMB_BITS - 2)),
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.sequence_mask = BREADCRUMB_MASK,
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.has_irq = NULL,
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.emit = i915_fence_emit_sequence,
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.flush = i915_fence_flush,
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.poll = i915_fence_poll,
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.needed_flush = i915_fence_needed_flush,
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.wait = i915_fence_wait,
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};
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