264 lines
7.3 KiB
C
264 lines
7.3 KiB
C
/**************************************************************************
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*
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* Copyright 2007 Dave Airlie
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*
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**************************************************************************/
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/*
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* Authors: Dave Airlie <airlied@linux.ie>
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*/
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#include "drmP.h"
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#include "radeon_drm.h"
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#include "radeon_drv.h"
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struct drm_ttm_backend *radeon_create_ttm_backend_entry(struct drm_device * dev)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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if(dev_priv->flags & RADEON_IS_AGP)
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return drm_agp_init_ttm(dev);
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else
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return ati_pcigart_init_ttm(dev, &dev_priv->gart_info, radeon_gart_flush);
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}
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int radeon_fence_types(struct drm_buffer_object *bo, uint32_t * class, uint32_t * type)
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{
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*class = 0;
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if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
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*type = 3;
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else
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*type = 1;
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return 0;
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}
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int radeon_invalidate_caches(struct drm_device * dev, uint64_t flags)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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BEGIN_RING(4);
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RADEON_FLUSH_CACHE();
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RADEON_FLUSH_ZCACHE();
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ADVANCE_RING();
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return 0;
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}
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uint64_t radeon_evict_flags(struct drm_buffer_object *bo)
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{
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switch (bo->mem.mem_type) {
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case DRM_BO_MEM_LOCAL:
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case DRM_BO_MEM_TT:
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return DRM_BO_FLAG_MEM_LOCAL;
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case DRM_BO_MEM_VRAM:
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if (bo->mem.num_pages > 128)
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return DRM_BO_MEM_TT;
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else
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return DRM_BO_MEM_LOCAL;
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default:
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return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
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}
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}
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int radeon_init_mem_type(struct drm_device * dev, uint32_t type,
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struct drm_mem_type_manager * man)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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switch (type) {
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case DRM_BO_MEM_LOCAL:
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man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
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_DRM_FLAG_MEMTYPE_CACHED;
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man->drm_bus_maptype = 0;
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break;
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case DRM_BO_MEM_VRAM:
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man->flags = _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_NEEDS_IOREMAP;
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man->io_addr = NULL;
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man->drm_bus_maptype = _DRM_FRAME_BUFFER;
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man->io_offset = drm_get_resource_start(dev, 0);
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man->io_size = drm_get_resource_len(dev, 0);
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break;
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case DRM_BO_MEM_TT:
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if (dev_priv->flags & RADEON_IS_AGP) {
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if (!(drm_core_has_AGP(dev) && dev->agp)) {
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DRM_ERROR("AGP is not enabled for memory type %u\n",
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(unsigned)type);
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return -EINVAL;
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}
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man->io_offset = dev->agp->agp_info.aper_base;
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man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
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man->io_addr = NULL;
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man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
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_DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
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man->drm_bus_maptype = _DRM_AGP;
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} else {
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man->io_offset = dev_priv->gart_vm_start;
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man->io_size = dev_priv->gart_size;
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man->io_addr = NULL;
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man->flags = _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_MEMTYPE_MAPPABLE | _DRM_FLAG_MEMTYPE_CMA;
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man->drm_bus_maptype = _DRM_SCATTER_GATHER;
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}
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break;
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default:
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DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
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return -EINVAL;
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}
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return 0;
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}
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static void radeon_emit_copy_blit(struct drm_device * dev,
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uint32_t src_offset,
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uint32_t dst_offset,
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uint32_t pages, int direction)
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{
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uint32_t cur_pages;
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uint32_t stride = PAGE_SIZE;
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drm_radeon_private_t *dev_priv = dev->dev_private;
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uint32_t format, height;
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RING_LOCALS;
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if (!dev_priv)
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return;
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/* 32-bit copy format */
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format = RADEON_COLOR_FORMAT_ARGB8888;
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/* radeon limited to 16k stride */
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stride &= 0x3fff;
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while(pages > 0) {
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cur_pages = pages;
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if (cur_pages > 2048)
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cur_pages = 2048;
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pages -= cur_pages;
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/* needs verification */
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BEGIN_RING(7);
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OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5));
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OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
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RADEON_GMC_DST_PITCH_OFFSET_CNTL |
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RADEON_GMC_BRUSH_NONE |
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(format << 8) |
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RADEON_GMC_SRC_DATATYPE_COLOR |
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RADEON_ROP3_S |
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RADEON_DP_SRC_SOURCE_MEMORY |
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RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
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if (direction) {
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OUT_RING((stride << 22) | (src_offset >> 10));
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OUT_RING((stride << 22) | (dst_offset >> 10));
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} else {
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OUT_RING((stride << 22) | (dst_offset >> 10));
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OUT_RING((stride << 22) | (src_offset >> 10));
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}
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OUT_RING(0);
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OUT_RING(pages); /* x - y */
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OUT_RING((stride << 16) | cur_pages);
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ADVANCE_RING();
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}
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BEGIN_RING(2);
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RADEON_WAIT_UNTIL_2D_IDLE();
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ADVANCE_RING();
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return;
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}
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static int radeon_move_blit(struct drm_buffer_object * bo,
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int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
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{
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struct drm_bo_mem_reg *old_mem = &bo->mem;
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int dir = 0;
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if ((old_mem->mem_type == new_mem->mem_type) &&
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(new_mem->mm_node->start <
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old_mem->mm_node->start + old_mem->mm_node->size)) {
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dir = 1;
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}
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radeon_emit_copy_blit(bo->dev,
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old_mem->mm_node->start << PAGE_SHIFT,
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new_mem->mm_node->start << PAGE_SHIFT,
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new_mem->num_pages, dir);
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return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
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DRM_FENCE_TYPE_EXE |
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DRM_RADEON_FENCE_TYPE_RW,
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DRM_RADEON_FENCE_FLAG_FLUSHED, new_mem);
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}
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static int radeon_move_flip(struct drm_buffer_object * bo,
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int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
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{
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struct drm_device *dev = bo->dev;
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struct drm_bo_mem_reg tmp_mem;
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int ret;
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tmp_mem = *new_mem;
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tmp_mem.mm_node = NULL;
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tmp_mem.flags = DRM_BO_FLAG_MEM_TT |
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DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
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ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
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if (ret)
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return ret;
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ret = drm_ttm_bind(bo->ttm, &tmp_mem);
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if (ret)
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goto out_cleanup;
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ret = radeon_move_blit(bo, 1, no_wait, &tmp_mem);
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if (ret)
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goto out_cleanup;
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ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
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out_cleanup:
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if (tmp_mem.mm_node) {
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mutex_lock(&dev->struct_mutex);
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if (tmp_mem.mm_node != bo->pinned_node)
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drm_mm_put_block(tmp_mem.mm_node);
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tmp_mem.mm_node = NULL;
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mutex_unlock(&dev->struct_mutex);
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}
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return ret;
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}
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int radeon_move(struct drm_buffer_object * bo,
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int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
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{
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struct drm_bo_mem_reg *old_mem = &bo->mem;
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DRM_DEBUG("\n");
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if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
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return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
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} else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
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if (radeon_move_flip(bo, evict, no_wait, new_mem))
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return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
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} else {
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if (radeon_move_blit(bo, evict, no_wait, new_mem))
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return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
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}
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return 0;
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}
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