281 lines
10 KiB
C
281 lines
10 KiB
C
/* drm.h -- Header for Direct Rendering Manager -*- linux-c -*-
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* Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
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* Revised: Mon Dec 6 17:11:19 1999 by faith@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* $PI: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h,v 1.46 1999/08/20 20:00:53 faith Exp $
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* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h,v 1.1 1999/09/25 14:37:58 dawes Exp $
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*
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* Acknowledgements:
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* Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
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*
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*/
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#ifndef _DRM_H_
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#define _DRM_H_
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#include <asm/ioctl.h> /* For _IO* macros */
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#define DRM_PROC_DEVICES "/proc/devices"
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#define DRM_PROC_MISC "/proc/misc"
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#define DRM_PROC_DRM "/proc/drm"
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#define DRM_DEV_DRM "/dev/drm"
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#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
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#define DRM_DEV_UID 0
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#define DRM_DEV_GID 0
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#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
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#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
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#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
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#define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */
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#define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */
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#define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */
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#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
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#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
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#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
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typedef unsigned long drm_handle_t;
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typedef unsigned int drm_context_t;
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typedef unsigned int drm_drawable_t;
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typedef unsigned int drm_magic_t;
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typedef struct drm_version {
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int version_major; /* Major version */
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int version_minor; /* Minor version */
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int version_patchlevel;/* Patch level */
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size_t name_len; /* Length of name buffer */
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char *name; /* Name of driver */
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size_t date_len; /* Length of date buffer */
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char *date; /* User-space buffer to hold date */
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size_t desc_len; /* Length of desc buffer */
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char *desc; /* User-space buffer to hold desc */
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} drm_version_t;
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typedef struct drm_unique {
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size_t unique_len; /* Length of unique */
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char *unique; /* Unique name for driver instantiation */
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} drm_unique_t;
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typedef struct drm_list {
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int count; /* Length of user-space structures */
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drm_version_t *version;
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} drm_list_t;
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typedef struct drm_block {
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int unused;
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} drm_block_t;
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typedef struct drm_control {
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enum {
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DRM_ADD_COMMAND,
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DRM_RM_COMMAND,
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DRM_INST_HANDLER,
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DRM_UNINST_HANDLER
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} func;
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int irq;
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} drm_control_t;
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typedef enum drm_map_type {
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_DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */
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_DRM_REGISTERS = 1, /* no caching, no core dump */
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_DRM_SHM = 2 /* shared, cached */
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} drm_map_type_t;
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typedef enum drm_map_flags {
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_DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */
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_DRM_READ_ONLY = 0x02,
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_DRM_LOCKED = 0x04, /* shared, cached, locked */
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_DRM_KERNEL = 0x08, /* kernel requires access */
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_DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
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_DRM_CONTAINS_LOCK = 0x20 /* SHM page that contains lock */
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} drm_map_flags_t;
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typedef struct drm_map {
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unsigned long offset; /* Requested physical address (0 for SAREA)*/
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unsigned long size; /* Requested physical size (bytes) */
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drm_map_type_t type; /* Type of memory to map */
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drm_map_flags_t flags; /* Flags */
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void *handle; /* User-space: "Handle" to pass to mmap */
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/* Kernel-space: kernel-virtual address */
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int mtrr; /* MTRR slot used */
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/* Private data */
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} drm_map_t;
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typedef enum drm_lock_flags {
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_DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
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_DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
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_DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */
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_DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */
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/* These *HALT* flags aren't supported yet
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-- they will be used to support the
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full-screen DGA-like mode. */
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_DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */
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_DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */
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} drm_lock_flags_t;
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typedef struct drm_lock {
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int context;
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drm_lock_flags_t flags;
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} drm_lock_t;
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typedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */
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/* Flags for DMA buffer dispatch */
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_DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched.
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Note, the buffer may not yet have
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been processed by the hardware --
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getting a hardware lock with the
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hardware quiescent will ensure
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that the buffer has been
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processed. */
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_DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */
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_DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */
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/* Flags for DMA buffer request */
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_DRM_DMA_WAIT = 0x10, /* Wait for free buffers */
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_DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */
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_DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */
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} drm_dma_flags_t;
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typedef struct drm_buf_desc {
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int count; /* Number of buffers of this size */
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int size; /* Size in bytes */
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int low_mark; /* Low water mark */
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int high_mark; /* High water mark */
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enum {
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DRM_PAGE_ALIGN = 0x01 /* Align on page boundaries for DMA */
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} flags;
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} drm_buf_desc_t;
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typedef struct drm_buf_info {
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int count; /* Entries in list */
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drm_buf_desc_t *list;
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} drm_buf_info_t;
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typedef struct drm_buf_free {
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int count;
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int *list;
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} drm_buf_free_t;
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typedef struct drm_buf_pub {
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int idx; /* Index into master buflist */
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int total; /* Buffer size */
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int used; /* Amount of buffer in use (for DMA) */
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void *address; /* Address of buffer */
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} drm_buf_pub_t;
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typedef struct drm_buf_map {
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int count; /* Length of buflist */
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void *virtual; /* Mmaped area in user-virtual */
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drm_buf_pub_t *list; /* Buffer information */
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} drm_buf_map_t;
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typedef struct drm_dma {
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/* Indices here refer to the offset into
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buflist in drm_buf_get_t. */
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int context; /* Context handle */
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int send_count; /* Number of buffers to send */
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int *send_indices; /* List of handles to buffers */
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int *send_sizes; /* Lengths of data to send */
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drm_dma_flags_t flags; /* Flags */
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int request_count; /* Number of buffers requested */
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int request_size; /* Desired size for buffers */
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int *request_indices; /* Buffer information */
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int *request_sizes;
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int granted_count; /* Number of buffers granted */
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} drm_dma_t;
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typedef enum {
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_DRM_CONTEXT_PRESERVED = 0x01,
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_DRM_CONTEXT_2DONLY = 0x02
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} drm_ctx_flags_t;
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typedef struct drm_ctx {
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drm_context_t handle;
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drm_ctx_flags_t flags;
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} drm_ctx_t;
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typedef struct drm_ctx_res {
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int count;
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drm_ctx_t *contexts;
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} drm_ctx_res_t;
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typedef struct drm_draw {
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drm_drawable_t handle;
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} drm_draw_t;
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typedef struct drm_auth {
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drm_magic_t magic;
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} drm_auth_t;
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typedef struct drm_irq_busid {
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int irq;
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int busnum;
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int devnum;
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int funcnum;
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} drm_irq_busid_t;
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#define DRM_IOCTL_BASE 'd'
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#define DRM_IOCTL_NR(n) _IOC_NR(n)
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#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
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#define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size)
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#define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size)
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#define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size)
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#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
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#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
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#define DRM_IOCTL_GET_MAGIC DRM_IOW( 0x02, drm_auth_t)
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#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
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#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
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#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
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#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
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#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
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#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
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#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
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#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
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#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
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#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
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#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
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#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
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#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
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#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
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#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
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#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
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#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
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#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
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#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
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#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
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#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
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#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
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#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
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#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
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#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
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#endif
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