603 lines
14 KiB
C
603 lines
14 KiB
C
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/****************************************************************************
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* Copyright (C) 2003-2006 by XGI Technology, Taiwan.
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* *
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* All Rights Reserved. *
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* *
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation on the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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* *
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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* *
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL XGI AND/OR
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* ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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***************************************************************************/
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#include "xgi_types.h"
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#include "xgi_linux.h"
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#include "xgi_drv.h"
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#include "xgi_regs.h"
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#include "xgi_pcie.h"
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void xgi_get_device_info(struct xgi_info * info, struct xgi_chip_info * req)
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{
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req->device_id = info->device_id;
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req->device_name[0] = 'x';
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req->device_name[1] = 'g';
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req->device_name[2] = '4';
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req->device_name[3] = '7';
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req->vendor_id = info->vendor_id;
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req->curr_display_mode = 0;
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req->fb_size = info->fb.size;
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req->sarea_bus_addr = info->sarea_info.bus_addr;
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req->sarea_size = info->sarea_info.size;
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}
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void xgi_get_mmio_info(struct xgi_info * info, struct xgi_mmio_info * req)
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{
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req->mmioBase = (void *)info->mmio.base;
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req->size = info->mmio.size;
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}
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void xgi_put_screen_info(struct xgi_info * info, struct xgi_screen_info * req)
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{
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info->scrn_info.scrn_start = req->scrn_start;
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info->scrn_info.scrn_xres = req->scrn_xres;
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info->scrn_info.scrn_yres = req->scrn_yres;
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info->scrn_info.scrn_bpp = req->scrn_bpp;
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info->scrn_info.scrn_pitch = req->scrn_pitch;
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XGI_INFO("info->scrn_info.scrn_start: 0x%lx"
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"info->scrn_info.scrn_xres: 0x%lx"
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"info->scrn_info.scrn_yres: 0x%lx"
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"info->scrn_info.scrn_bpp: 0x%lx"
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"info->scrn_info.scrn_pitch: 0x%lx\n",
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info->scrn_info.scrn_start,
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info->scrn_info.scrn_xres,
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info->scrn_info.scrn_yres,
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info->scrn_info.scrn_bpp, info->scrn_info.scrn_pitch);
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}
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void xgi_get_screen_info(struct xgi_info * info, struct xgi_screen_info * req)
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{
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req->scrn_start = info->scrn_info.scrn_start;
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req->scrn_xres = info->scrn_info.scrn_xres;
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req->scrn_yres = info->scrn_info.scrn_yres;
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req->scrn_bpp = info->scrn_info.scrn_bpp;
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req->scrn_pitch = info->scrn_info.scrn_pitch;
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XGI_INFO("req->scrn_start: 0x%lx"
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"req->scrn_xres: 0x%lx"
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"req->scrn_yres: 0x%lx"
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"req->scrn_bpp: 0x%lx"
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"req->scrn_pitch: 0x%lx\n",
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req->scrn_start,
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req->scrn_xres,
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req->scrn_yres, req->scrn_bpp, req->scrn_pitch);
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}
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void xgi_ge_reset(struct xgi_info * info)
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{
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xgi_disable_ge(info);
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xgi_enable_ge(info);
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}
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void xgi_sarea_info(struct xgi_info * info, struct xgi_sarea_info * req)
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{
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info->sarea_info.bus_addr = req->bus_addr;
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info->sarea_info.size = req->size;
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XGI_INFO("info->sarea_info.bus_addr: 0x%lx"
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"info->sarea_info.size: 0x%lx\n",
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info->sarea_info.bus_addr, info->sarea_info.size);
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}
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/*
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* irq functions
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*/
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#define STALL_INTERRUPT_RESET_THRESHOLD 0xffff
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static U32 s_invalid_begin = 0;
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bool xgi_ge_irq_handler(struct xgi_info * info)
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{
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volatile u8 *mmio_vbase = info->mmio.vbase;
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volatile U32 *ge_3d_status = (volatile U32 *)(mmio_vbase + 0x2800);
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U32 int_status = ge_3d_status[4]; // interrupt status
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U32 auto_reset_count = 0;
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bool is_support_auto_reset = FALSE;
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// Check GE on/off
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if (0 == (0xffffc0f0 & int_status)) {
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U32 old_ge_status = ge_3d_status[0x00];
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U32 old_pcie_cmd_fetch_Addr = ge_3d_status[0x0a];
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if (0 != (0x1000 & int_status)) {
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// We got GE stall interrupt.
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ge_3d_status[0x04] = int_status | 0x04000000;
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if (TRUE == is_support_auto_reset) {
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bool is_wrong_signal = FALSE;
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static U32 last_int_tick_low,
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last_int_tick_high;
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static U32 new_int_tick_low;
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static U32 continoue_int_count = 0;
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// OE II is busy.
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while (old_ge_status & 0x001c0000) {
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u16 check;
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// Check Read back status
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*(mmio_vbase + 0x235c) = 0x80;
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check =
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*((volatile u16 *)(mmio_vbase +
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0x2360));
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if ((check & 0x3f) !=
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((check & 0x3f00) >> 8)) {
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is_wrong_signal = TRUE;
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break;
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}
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// Check RO channel
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*(mmio_vbase + 0x235c) = 0x83;
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check =
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*((volatile u16 *)(mmio_vbase +
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0x2360));
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if ((check & 0x0f) !=
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((check & 0xf0) >> 4)) {
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is_wrong_signal = TRUE;
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break;
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}
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// Check RW channel
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*(mmio_vbase + 0x235c) = 0x88;
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check =
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*((volatile u16 *)(mmio_vbase +
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0x2360));
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if ((check & 0x0f) !=
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((check & 0xf0) >> 4)) {
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is_wrong_signal = TRUE;
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break;
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}
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// Check RO channel outstanding
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*(mmio_vbase + 0x235c) = 0x8f;
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check =
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*((volatile u16 *)(mmio_vbase +
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0x2360));
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if (0 != (check & 0x3ff)) {
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is_wrong_signal = TRUE;
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break;
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}
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// Check RW channel outstanding
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*(mmio_vbase + 0x235c) = 0x90;
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check =
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*((volatile u16 *)(mmio_vbase +
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0x2360));
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if (0 != (check & 0x3ff)) {
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is_wrong_signal = TRUE;
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break;
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}
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// No pending PCIE request. GE stall.
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break;
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}
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if (is_wrong_signal) {
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// Nothing but skip.
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} else if (0 == continoue_int_count++) {
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rdtsc(last_int_tick_low,
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last_int_tick_high);
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} else {
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rdtscl(new_int_tick_low);
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if ((new_int_tick_low -
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last_int_tick_low) >
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STALL_INTERRUPT_RESET_THRESHOLD) {
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continoue_int_count = 0;
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} else if (continoue_int_count >= 3) {
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int time_out;
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continoue_int_count = 0;
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// GE Hung up, need reset.
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XGI_INFO("Reset GE!\n");
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*(mmio_vbase + 0xb057) = 8;
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time_out = 0xffff;
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while (0 !=
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(ge_3d_status[0x00] &
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0xf0000000)) {
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while (0 !=
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((--time_out) &
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0xfff)) ;
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if (0 == time_out) {
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u8 old_3ce;
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u8 old_3cf;
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u8 old_index;
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u8 old_36;
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XGI_INFO
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("Can not reset back 0x%lx!\n",
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ge_3d_status
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[0x00]);
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*(mmio_vbase +
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0xb057) = 0;
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// Have to use 3x5.36 to reset.
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// Save and close dynamic gating
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old_3ce =
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*(mmio_vbase
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+ 0x3ce);
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*(mmio_vbase +
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0x3ce) = 0x2a;
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old_3cf =
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*(mmio_vbase
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+ 0x3cf);
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*(mmio_vbase +
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0x3cf) =
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old_3cf & 0xfe;
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// Reset GE
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old_index =
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*(mmio_vbase
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+ 0x3d4);
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*(mmio_vbase +
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0x3d4) = 0x36;
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old_36 =
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*(mmio_vbase
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+ 0x3d5);
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*(mmio_vbase +
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0x3d5) =
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old_36 | 0x10;
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while (0 !=
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((--time_out) & 0xfff)) ;
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*(mmio_vbase +
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0x3d5) =
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old_36;
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*(mmio_vbase +
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0x3d4) =
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old_index;
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// Restore dynamic gating
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*(mmio_vbase +
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0x3cf) =
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old_3cf;
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*(mmio_vbase +
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0x3ce) =
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old_3ce;
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break;
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}
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}
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*(mmio_vbase + 0xb057) = 0;
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// Increase Reset counter
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auto_reset_count++;
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}
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}
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}
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return TRUE;
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} else if (0 != (0x1 & int_status)) {
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s_invalid_begin++;
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ge_3d_status[0x04] = (int_status & ~0x01) | 0x04000000;
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return TRUE;
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}
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}
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return FALSE;
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}
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bool xgi_crt_irq_handler(struct xgi_info * info)
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{
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bool ret = FALSE;
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u8 save_3ce = bReadReg(0x3ce);
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if (bIn3cf(0x37) & 0x01) // CRT1 interrupt just happened
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{
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u8 op3cf_3d;
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u8 op3cf_37;
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// What happened?
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op3cf_37 = bIn3cf(0x37);
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// Clear CRT interrupt
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op3cf_3d = bIn3cf(0x3d);
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bOut3cf(0x3d, (op3cf_3d | 0x04));
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bOut3cf(0x3d, (op3cf_3d & ~0x04));
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ret = TRUE;
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}
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bWriteReg(0x3ce, save_3ce);
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return (ret);
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}
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bool xgi_dvi_irq_handler(struct xgi_info * info)
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{
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bool ret = FALSE;
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u8 save_3ce = bReadReg(0x3ce);
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if (bIn3cf(0x38) & 0x20) // DVI interrupt just happened
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{
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u8 op3cf_39;
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u8 op3cf_37;
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u8 op3x5_5a;
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u8 save_3x4 = bReadReg(0x3d4);;
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// What happened?
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op3cf_37 = bIn3cf(0x37);
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//Notify BIOS that DVI plug/unplug happened
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op3x5_5a = bIn3x5(0x5a);
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bOut3x5(0x5a, op3x5_5a & 0xf7);
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bWriteReg(0x3d4, save_3x4);
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// Clear DVI interrupt
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op3cf_39 = bIn3cf(0x39);
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bOut3c5(0x39, (op3cf_39 & ~0x01)); //Set 3cf.39 bit 0 to 0
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bOut3c5(0x39, (op3cf_39 | 0x01)); //Set 3cf.39 bit 0 to 1
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ret = TRUE;
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}
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bWriteReg(0x3ce, save_3ce);
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return (ret);
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}
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void xgi_dump_register(struct xgi_info * info)
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{
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int i, j;
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unsigned char temp;
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// 0x3C5
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printk("\r\n=====xgi_dump_register========0x%x===============\r\n",
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0x3C5);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x10; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bIn3c5(i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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// 0x3D5
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printk("\r\n====xgi_dump_register=========0x%x===============\r\n",
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0x3D5);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x10; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bIn3x5(i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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// 0x3CF
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printk("\r\n=========xgi_dump_register====0x%x===============\r\n",
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0x3CF);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x10; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bIn3cf(i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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printk("\r\n=====xgi_dump_register======0x%x===============\r\n",
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0xB000);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x5; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bReadReg(0xB000 + i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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printk("\r\n==================0x%x===============\r\n", 0x2200);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0xB; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bReadReg(0x2200 + i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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printk("\r\n==================0x%x===============\r\n", 0x2300);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x7; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bReadReg(0x2300 + i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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printk("\r\n==================0x%x===============\r\n", 0x2400);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x10; i++) {
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printk("%1x ", i);
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for (j = 0; j < 0x10; j++) {
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temp = bReadReg(0x2400 + i * 0x10 + j);
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printk("%3x", temp);
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}
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printk("\r\n");
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}
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printk("\r\n==================0x%x===============\r\n", 0x2800);
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for (i = 0; i < 0x10; i++) {
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if (i == 0) {
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printk("%5x", i);
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} else {
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printk("%3x", i);
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}
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}
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printk("\r\n");
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for (i = 0; i < 0x10; i++) {
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printk("%1x ", i);
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|
|
for (j = 0; j < 0x10; j++) {
|
|
temp = bReadReg(0x2800 + i * 0x10 + j);
|
|
printk("%3x", temp);
|
|
}
|
|
printk("\r\n");
|
|
}
|
|
}
|
|
|
|
void xgi_restore_registers(struct xgi_info * info)
|
|
{
|
|
bOut3x5(0x13, 0);
|
|
bOut3x5(0x8b, 2);
|
|
}
|
|
|
|
void xgi_waitfor_pci_idle(struct xgi_info * info)
|
|
{
|
|
#define WHOLD_GE_STATUS 0x2800
|
|
#define IDLE_MASK ~0x90200000
|
|
|
|
int idleCount = 0;
|
|
while (idleCount < 5) {
|
|
if (dwReadReg(WHOLD_GE_STATUS) & IDLE_MASK) {
|
|
idleCount = 0;
|
|
} else {
|
|
idleCount++;
|
|
}
|
|
}
|
|
}
|
|
|
|
int xgi_get_cpu_id(struct cpu_info *arg)
|
|
{
|
|
int op = arg->_eax;
|
|
__asm__("cpuid":"=a"(arg->_eax),
|
|
"=b"(arg->_ebx),
|
|
"=c"(arg->_ecx), "=d"(arg->_edx)
|
|
: "0"(op));
|
|
|
|
XGI_INFO
|
|
("opCode = 0x%x, eax = 0x%x, ebx = 0x%x, ecx = 0x%x, edx = 0x%x \n",
|
|
op, arg->_eax, arg->_ebx, arg->_ecx, arg->_edx);
|
|
}
|
|
|
|
/*memory collect function*/
|
|
extern struct list_head xgi_mempid_list;
|
|
void xgi_mem_collect(struct xgi_info * info, unsigned int *pcnt)
|
|
{
|
|
struct xgi_mem_pid *block;
|
|
struct xgi_mem_pid *next;
|
|
struct task_struct *p, *find;
|
|
unsigned int cnt = 0;
|
|
|
|
list_for_each_entry_safe(block, next, &xgi_mempid_list, list) {
|
|
|
|
find = NULL;
|
|
XGI_SCAN_PROCESS(p) {
|
|
if (p->pid == block->pid) {
|
|
XGI_INFO
|
|
("[!]Find active pid:%ld state:%ld location:%d addr:0x%lx! \n",
|
|
block->pid, p->state,
|
|
block->location,
|
|
block->bus_addr);
|
|
find = p;
|
|
if (block->bus_addr == 0xFFFFFFFF)
|
|
++cnt;
|
|
break;
|
|
}
|
|
}
|
|
if (!find) {
|
|
if (block->location == LOCAL) {
|
|
XGI_INFO
|
|
("Memory ProcessID free fb and delete one block pid:%ld addr:0x%lx successfully! \n",
|
|
block->pid, block->bus_addr);
|
|
xgi_fb_free(info, block->bus_addr);
|
|
} else if (block->bus_addr != 0xFFFFFFFF) {
|
|
XGI_INFO
|
|
("Memory ProcessID free pcie and delete one block pid:%ld addr:0x%lx successfully! \n",
|
|
block->pid, block->bus_addr);
|
|
xgi_pcie_free(info, block->bus_addr);
|
|
} else {
|
|
/*only delete the memory block */
|
|
list_del(&block->list);
|
|
XGI_INFO
|
|
("Memory ProcessID delete one pcie block pid:%ld successfully! \n",
|
|
block->pid);
|
|
kfree(block);
|
|
}
|
|
}
|
|
}
|
|
*pcnt = cnt;
|
|
}
|