61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/*
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* Copyright 2007 Jérôme Glisse
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* Copyright 2007 Dave Airlie
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* Copyright 2007 Alex Deucher
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors:
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* Jérôme Glisse <glisse@freedesktop.org>
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*/
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#ifndef __RADEON_MS_DRM_H__
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#define __RADEON_MS_DRM_H__
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/* fence definitions */
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/* The only fence class we support */
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#define DRM_RADEON_FENCE_CLASS_ACCEL 0
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/* Fence type that guarantees read-write flush */
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#define DRM_RADEON_FENCE_TYPE_RW 2
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/* cache flushes programmed just before the fence */
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#define DRM_RADEON_FENCE_FLAG_FLUSHED 0x01000000
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/* radeon ms ioctl */
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#define DRM_RADEON_EXECBUFFER 0x00
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struct drm_radeon_execbuffer_arg {
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uint64_t next;
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uint32_t reloc_offset;
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union {
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struct drm_bo_op_req req;
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struct drm_bo_arg_rep rep;
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} d;
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};
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struct drm_radeon_execbuffer {
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uint32_t args_count;
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uint64_t args;
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uint32_t cmd_size;
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struct drm_fence_arg fence_arg;
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};
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#endif
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