124 lines
4.0 KiB
C
124 lines
4.0 KiB
C
/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
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* Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*/
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#ifndef __GAMMA_H__
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#define __GAMMA_H__
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/* This remains constant for all DRM template files.
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*/
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#define DRM(x) gamma_##x
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/* General customization:
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*/
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#define __HAVE_MTRR 1
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_AGP 1
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#define __MUST_HAVE_AGP 0
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#define __HAVE_OLD_DMA 1
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#define __HAVE_PCI_DMA 1
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#define __HAVE_MULTIPLE_DMA_QUEUES 1
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#define __HAVE_DMA_WAITQUEUE 1
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#define __HAVE_DMA_WAITLIST 1
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#define __HAVE_DMA_FREELIST 1
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#define __HAVE_DMA_FLUSH 1
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#define __HAVE_DMA_SCHEDULE 1
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#define __HAVE_DMA_READY 1
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#define DRIVER_DMA_READY() do { \
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gamma_dma_ready(dev); \
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} while (0)
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#define __HAVE_DMA_QUIESCENT 1
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#define DRIVER_DMA_QUIESCENT() do { \
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/* FIXME ! */ \
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gamma_dma_quiescent_single(dev); \
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return 0; \
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} while (0)
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_DMA_IRQ_BH 1
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#if 1
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#define DRIVER_PREINSTALL() do { \
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drm_gamma_private_t *dev_priv = \
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(drm_gamma_private_t *)dev->dev_private;\
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 ); \
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GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 ); \
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} while (0)
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#define DRIVER_POSTINSTALL() do { \
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drm_gamma_private_t *dev_priv = \
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(drm_gamma_private_t *)dev->dev_private;\
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
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GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 ); \
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GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 ); \
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GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 ); \
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} while (0)
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#else
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#define DRIVER_POSTINSTALL() do { \
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drm_gamma_private_t *dev_priv = \
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(drm_gamma_private_t *)dev->dev_private;\
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 ); \
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GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 ); \
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} while (0)
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#define DRIVER_PREINSTALL() do { \
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drm_gamma_private_t *dev_priv = \
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(drm_gamma_private_t *)dev->dev_private;\
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );\
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GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );\
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} while (0)
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#endif
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#define DRIVER_UNINSTALL() do { \
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drm_gamma_private_t *dev_priv = \
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(drm_gamma_private_t *)dev->dev_private;\
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2); \
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while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3); \
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GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 ); \
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GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 ); \
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GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 ); \
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} while (0)
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#define DRIVER_AGP_BUFFERS_MAP( dev ) \
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((drm_gamma_private_t *)((dev)->dev_private))->buffers
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#endif /* __GAMMA_H__ */
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