360 lines
10 KiB
C
360 lines
10 KiB
C
/*
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* Copyright (C) 2008 Maarten Maathuis.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "nv50_display.h"
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#include "nv50_crtc.h"
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#include "nv50_output.h"
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#include "nv50_connector.h"
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static int nv50_display_pre_init(struct nv50_display *display)
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{
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struct drm_device *dev = display->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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int i;
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uint32_t ram_amount;
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NV50_DEBUG("\n");
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NV_WRITE(0x00610184, NV_READ(0x00614004));
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/*
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* I think the 0x006101XX range is some kind of main control area that enables things.
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*/
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/* CRTC? */
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NV_WRITE(0x00610190 + 0 * 0x10, NV_READ(0x00616100 + 0 * 0x800));
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NV_WRITE(0x00610190 + 1 * 0x10, NV_READ(0x00616100 + 1 * 0x800));
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NV_WRITE(0x00610194 + 0 * 0x10, NV_READ(0x00616104 + 0 * 0x800));
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NV_WRITE(0x00610194 + 1 * 0x10, NV_READ(0x00616104 + 1 * 0x800));
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NV_WRITE(0x00610198 + 0 * 0x10, NV_READ(0x00616108 + 0 * 0x800));
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NV_WRITE(0x00610198 + 1 * 0x10, NV_READ(0x00616108 + 1 * 0x800));
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NV_WRITE(0x0061019c + 0 * 0x10, NV_READ(0x0061610c + 0 * 0x800));
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NV_WRITE(0x0061019c + 1 * 0x10, NV_READ(0x0061610c + 1 * 0x800));
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/* DAC */
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NV_WRITE(0x006101d0 + 0 * 0x4, NV_READ(0x0061a000 + 0 * 0x800));
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NV_WRITE(0x006101d0 + 1 * 0x4, NV_READ(0x0061a000 + 1 * 0x800));
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NV_WRITE(0x006101d0 + 2 * 0x4, NV_READ(0x0061a000 + 2 * 0x800));
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/* SOR */
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NV_WRITE(0x006101e0 + 0 * 0x4, NV_READ(0x0061c000 + 0 * 0x800));
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NV_WRITE(0x006101e0 + 1 * 0x4, NV_READ(0x0061c000 + 1 * 0x800));
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/* Something not yet in use, tv-out maybe. */
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NV_WRITE(0x006101f0 + 0 * 0x4, NV_READ(0x0061e000 + 0 * 0x800));
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NV_WRITE(0x006101f0 + 1 * 0x4, NV_READ(0x0061e000 + 1 * 0x800));
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NV_WRITE(0x006101f0 + 2 * 0x4, NV_READ(0x0061e000 + 2 * 0x800));
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for (i = 0; i < 3; i++) {
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NV_WRITE(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(i), 0x00550000 | NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_PENDING);
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NV_WRITE(NV50_PDISPLAY_DAC_REGS_CLK_CTRL1(i), 0x00000001);
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}
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/* This used to be in crtc unblank, but seems out of place there. */
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NV_WRITE(NV50_PDISPLAY_UNK_380, 0);
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/* RAM is clamped to 256 MiB. */
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ram_amount = nouveau_mem_fb_amount(display->dev);
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NV50_DEBUG("ram_amount %d\n", ram_amount);
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if (ram_amount > 256*1024*1024)
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ram_amount = 256*1024*1024;
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NV_WRITE(NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1);
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NV_WRITE(NV50_PDISPLAY_UNK_388, 0x150000);
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NV_WRITE(NV50_PDISPLAY_UNK_38C, 0);
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display->preinit_done = true;
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return 0;
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}
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static int nv50_display_init(struct nv50_display *display)
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{
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struct drm_device *dev = display->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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uint32_t val;
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NV50_DEBUG("\n");
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/* The precise purpose is unknown, i suspect it has something to do with text mode. */
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if (NV_READ(NV50_PDISPLAY_SUPERVISOR) & 0x100) {
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NV_WRITE(NV50_PDISPLAY_SUPERVISOR, 0x100);
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NV_WRITE(0x006194e8, NV_READ(0x006194e8) & ~1);
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while (NV_READ(0x006194e8) & 2);
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}
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/* taken from nv bug #12637 */
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NV_WRITE(NV50_PDISPLAY_UNK200_CTRL, 0x2b00);
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do {
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val = NV_READ(NV50_PDISPLAY_UNK200_CTRL);
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if ((val & 0x9f0000) == 0x20000)
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NV_WRITE(NV50_PDISPLAY_UNK200_CTRL, val | 0x800000);
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if ((val & 0x3f0000) == 0x30000)
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NV_WRITE(NV50_PDISPLAY_UNK200_CTRL, val | 0x200000);
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} while (val & 0x1e0000);
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NV_WRITE(NV50_PDISPLAY_CTRL_STATE, NV50_PDISPLAY_CTRL_STATE_ENABLE);
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NV_WRITE(NV50_PDISPLAY_UNK200_CTRL, 0x1000b03);
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while (!(NV_READ(NV50_PDISPLAY_UNK200_CTRL) & 0x40000000));
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/* For the moment this is just a wrapper, which should be replaced with a real fifo at some point. */
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OUT_MODE(NV50_UNK84, 0);
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OUT_MODE(NV50_UNK88, 0);
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OUT_MODE(NV50_CRTC0_BLANK_CTRL, NV50_CRTC0_BLANK_CTRL_BLANK);
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OUT_MODE(NV50_CRTC0_UNK800, 0);
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OUT_MODE(NV50_CRTC0_DISPLAY_START, 0);
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OUT_MODE(NV50_CRTC0_UNK82C, 0);
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/* enable clock change interrupts. */
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NV_WRITE(NV50_PDISPLAY_SUPERVISOR_INTR, NV_READ(NV50_PDISPLAY_SUPERVISOR_INTR) | 0x70);
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/* enable hotplug interrupts */
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NV_WRITE(NV50_PCONNECTOR_HOTPLUG_INTR, 0x7FFF7FFF);
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display->init_done = true;
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return 0;
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}
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static int nv50_display_disable(struct nv50_display *display)
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{
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struct drm_device *dev = display->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nv50_crtc *crtc = NULL;
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int i;
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NV50_DEBUG("\n");
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list_for_each_entry(crtc, &display->crtcs, item) {
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crtc->blank(crtc, true);
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}
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display->update(display);
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/* Almost like ack'ing a vblank interrupt, maybe in the spirit of cleaning up? */
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list_for_each_entry(crtc, &display->crtcs, item) {
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if (crtc->enabled) {
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uint32_t mask;
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if (crtc->index == 1)
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mask = NV50_PDISPLAY_SUPERVISOR_CRTC1;
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else
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mask = NV50_PDISPLAY_SUPERVISOR_CRTC0;
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NV_WRITE(NV50_PDISPLAY_SUPERVISOR, mask);
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while (!(NV_READ(NV50_PDISPLAY_SUPERVISOR) & mask));
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}
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}
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NV_WRITE(NV50_PDISPLAY_UNK200_CTRL, 0);
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NV_WRITE(NV50_PDISPLAY_CTRL_STATE, 0);
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while ((NV_READ(NV50_PDISPLAY_UNK200_CTRL) & 0x1e0000) != 0);
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for (i = 0; i < 2; i++) {
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while (NV_READ(NV50_PDISPLAY_SOR_REGS_DPMS_STATE(i)) & NV50_PDISPLAY_SOR_REGS_DPMS_STATE_WAIT);
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}
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/* disable clock change interrupts. */
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NV_WRITE(NV50_PDISPLAY_SUPERVISOR_INTR, NV_READ(NV50_PDISPLAY_SUPERVISOR_INTR) & ~0x70);
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/* disable hotplug interrupts */
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NV_WRITE(NV50_PCONNECTOR_HOTPLUG_INTR, 0);
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display->init_done = false;
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return 0;
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}
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static int nv50_display_update(struct nv50_display *display)
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{
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struct drm_device *dev = display->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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NV50_DEBUG("\n");
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OUT_MODE(NV50_UPDATE_DISPLAY, 0);
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return 0;
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}
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int nv50_display_create(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nv50_display *display = kzalloc(sizeof(struct nv50_display), GFP_KERNEL);
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int i, type, output_index, bus;
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/* DAC0, DAC1, DAC2, SOR0, SOR1*/
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int or_counter[5] = {0, 0, 0, 0, 0};
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int i2c_index[5] = {0, 0, 0, 0, 0};
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uint32_t bus_mask = 0;
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uint32_t bus_digital = 0, bus_analog = 0;
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NV50_DEBUG("\n");
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if (!display)
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return -ENOMEM;
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INIT_LIST_HEAD(&display->crtcs);
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INIT_LIST_HEAD(&display->outputs);
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INIT_LIST_HEAD(&display->connectors);
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dev_priv->display_priv = display;
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for (i = 0; i < 2; i++) {
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nv50_crtc_create(dev, i);
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}
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/* we setup the outputs up from the BIOS table */
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for (i = 0 ; i < dev_priv->dcb_table.entries; i++) {
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type = dev_priv->dcb_table.entry[i].type;
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output_index = ffs(dev_priv->dcb_table.entry[i].or) - 1;
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bus = dev_priv->dcb_table.entry[i].bus;
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switch (type) {
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case DCB_OUTPUT_TMDS:
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case DCB_OUTPUT_LVDS:
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or_counter[output_index + 3] += 1;
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i2c_index[output_index + 3] = dev_priv->dcb_table.entry[i].i2c_index;
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bus_digital |= (1 << bus);
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nv50_sor_create(dev, i);
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break;
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case DCB_OUTPUT_ANALOG:
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or_counter[output_index] += 1;
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i2c_index[output_index] = dev_priv->dcb_table.entry[i].i2c_index;
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bus_analog |= (1 << bus);
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nv50_dac_create(dev, i);
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break;
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default:
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break;
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}
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}
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/* setup the connectors based on the output tables. */
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for (i = 0 ; i < dev_priv->dcb_table.entries; i++) {
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int connector_type = 0;
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type = dev_priv->dcb_table.entry[i].type;
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bus = dev_priv->dcb_table.entry[i].bus;
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/* already done? */
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if (bus_mask & (1 << bus))
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continue;
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/* only do it for supported outputs */
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if (type != DCB_OUTPUT_ANALOG && type != DCB_OUTPUT_TMDS
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&& type != DCB_OUTPUT_LVDS)
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continue;
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switch (type) {
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case DCB_OUTPUT_TMDS:
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case DCB_OUTPUT_ANALOG:
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if ((bus_digital & (1 << bus)) && (bus_analog & (1 << bus)))
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connector_type = CONNECTOR_DVI_I;
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else if (bus_digital & (1 << bus))
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connector_type = CONNECTOR_DVI_D;
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else if (bus_analog & (1 << bus))
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connector_type = CONNECTOR_VGA;
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break;
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case DCB_OUTPUT_LVDS:
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connector_type = CONNECTOR_LVDS;
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break;
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default:
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connector_type = CONNECTOR_UNKNOWN;
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break;
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}
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if (connector_type == CONNECTOR_UNKNOWN)
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continue;
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nv50_connector_create(dev, bus, dev_priv->dcb_table.entry[i].i2c_index, connector_type);
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bus_mask |= (1 << bus);
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}
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display->dev = dev;
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/* function pointers */
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display->init = nv50_display_init;
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display->pre_init = nv50_display_pre_init;
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display->disable = nv50_display_disable;
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display->update = nv50_display_update;
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return 0;
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}
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int nv50_display_destroy(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nv50_display *display = nv50_get_display(dev);
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struct nv50_crtc *crtc = NULL;
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struct nv50_output *output = NULL;
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struct nv50_connector *connector = NULL;
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NV50_DEBUG("\n");
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if (display->init_done)
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display->disable(display);
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list_for_each_entry(connector, &display->connectors, item) {
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connector->destroy(connector);
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}
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list_for_each_entry(output, &display->outputs, item) {
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output->destroy(output);
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}
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list_for_each_entry(crtc, &display->crtcs, item) {
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crtc->destroy(crtc);
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}
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kfree(display);
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dev_priv->display_priv = NULL;
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return 0;
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}
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/* This can be replaced with a real fifo in the future. */
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void nv50_display_command(struct drm_nouveau_private *dev_priv, uint32_t mthd, uint32_t val)
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{
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uint32_t counter = 0;
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#if 1
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DRM_INFO("mthd 0x%03X val 0x%08X\n", mthd, val);
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#endif
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NV_WRITE(NV50_PDISPLAY_CTRL_VAL, val);
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NV_WRITE(NV50_PDISPLAY_CTRL_STATE, NV50_PDISPLAY_CTRL_STATE_PENDING | 0x10000 | mthd | NV50_PDISPLAY_CTRL_STATE_ENABLE);
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while (NV_READ(NV50_PDISPLAY_CTRL_STATE) & NV50_PDISPLAY_CTRL_STATE_PENDING) {
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counter++;
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if (counter > 1000000) {
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DRM_ERROR("You probably need a reboot now\n");
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break;
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}
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udelay(1);
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}
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}
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struct nv50_display *nv50_get_display(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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return (struct nv50_display *) dev_priv->display_priv;
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}
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