405 lines
12 KiB
C
405 lines
12 KiB
C
/*
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* Copyright 2007 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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#include "radeon_ms.h"
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#include "amd.h"
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static inline void amd_cmd_bo_cleanup(struct drm_device *dev,
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struct amd_cmd *cmd)
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{
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struct amd_cmd_bo *bo;
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mutex_lock(&dev->struct_mutex);
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list_for_each_entry(bo, &cmd->bo_unused.list, list) {
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drm_bo_usage_deref_locked(&bo->bo);
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}
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list_for_each_entry(bo, &cmd->bo_used.list, list) {
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drm_bo_usage_deref_locked(&bo->bo);
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}
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mutex_unlock(&dev->struct_mutex);
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}
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static inline int amd_cmd_bo_validate(struct drm_device *dev,
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struct drm_file *file,
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struct amd_cmd_bo *cmd_bo,
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struct drm_amd_cmd_bo *bo,
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uint64_t data)
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{
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int ret;
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/* validate only cmd indirect or data bo */
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switch (bo->type) {
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case DRM_AMD_CMD_BO_TYPE_CMD_INDIRECT:
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case DRM_AMD_CMD_BO_TYPE_DATA:
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case DRM_AMD_CMD_BO_TYPE_CMD_RING:
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/* FIXME: make sure userspace can no longer map the bo */
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break;
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default:
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return 0;
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}
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/* check that buffer operation is validate */
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if (bo->op_req.op != drm_bo_validate) {
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DRM_ERROR("buffer 0x%x object operation is not validate.\n",
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cmd_bo->handle);
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return -EINVAL;
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}
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/* validate buffer */
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memset(&bo->op_rep, 0, sizeof(struct drm_bo_arg_rep));
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ret = drm_bo_handle_validate(file,
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bo->op_req.bo_req.handle,
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bo->op_req.bo_req.flags,
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bo->op_req.bo_req.mask,
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bo->op_req.bo_req.hint,
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bo->op_req.bo_req.fence_class,
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&bo->op_rep.bo_info,
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&cmd_bo->bo);
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if (ret) {
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DRM_ERROR("validate error %d for 0x%08x\n",
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ret, cmd_bo->handle);
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return ret;
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}
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if (copy_to_user((void __user *)((unsigned)data), bo,
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sizeof(struct drm_amd_cmd_bo))) {
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DRM_ERROR("failed to copy to user validate result of 0x%08x\n",
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cmd_bo->handle);
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return -EFAULT;
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}
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return 0;
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}
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static int amd_cmd_parse_cmd_bo(struct drm_device *dev,
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struct drm_file *file,
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struct drm_amd_cmd *drm_amd_cmd,
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struct amd_cmd *cmd)
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{
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struct drm_amd_cmd_bo drm_amd_cmd_bo;
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struct amd_cmd_bo *cmd_bo;
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uint32_t bo_count = 0;
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uint64_t data = drm_amd_cmd->bo;
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int ret = 0;
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do {
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/* check we don't have more buffer than announced */
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if (bo_count >= drm_amd_cmd->bo_count) {
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DRM_ERROR("cmd bo count exceeded got %d waited %d\n.",
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bo_count, drm_amd_cmd->bo_count);
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return -EINVAL;
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}
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/* initialize amd_cmd_bo */
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cmd_bo = &cmd->bo[bo_count];
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INIT_LIST_HEAD(&cmd_bo->list);
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cmd_bo->bo = NULL;
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/* copy from userspace */
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if (copy_from_user(&drm_amd_cmd_bo,
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(void __user *)((unsigned)data),
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sizeof(struct drm_amd_cmd_bo))) {
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return -EFAULT;
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}
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/* collect informations */
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cmd_bo->type = drm_amd_cmd_bo.type;
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cmd_bo->mask = drm_amd_cmd_bo.op_req.bo_req.mask;
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cmd_bo->flags = drm_amd_cmd_bo.op_req.bo_req.flags;
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cmd_bo->handle = drm_amd_cmd_bo.op_req.arg_handle;
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/* get bo objects */
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mutex_lock(&dev->struct_mutex);
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cmd_bo->bo = drm_lookup_buffer_object(file, cmd_bo->handle, 1);
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mutex_unlock(&dev->struct_mutex);
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if (cmd_bo->bo == NULL) {
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DRM_ERROR("unknown bo handle 0x%x\n", cmd_bo->handle);
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return -EINVAL;
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}
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/* validate buffer if necessary */
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ret = amd_cmd_bo_validate(dev, file, cmd_bo,
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&drm_amd_cmd_bo, data);
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if (ret) {
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mutex_lock(&dev->struct_mutex);
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drm_bo_usage_deref_locked(&cmd_bo->bo);
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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/* inspect bo type */
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switch (cmd_bo->type) {
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case DRM_AMD_CMD_BO_TYPE_CMD_INDIRECT:
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/* add it so we properly unreference in case of error */
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list_add_tail(&cmd_bo->list, &cmd->bo_used.list);
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return -EINVAL;
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case DRM_AMD_CMD_BO_TYPE_DATA:
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/* add to unused list */
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list_add_tail(&cmd_bo->list, &cmd->bo_unused.list);
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break;
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case DRM_AMD_CMD_BO_TYPE_CMD_RING:
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/* set cdw_bo */
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list_add_tail(&cmd_bo->list, &cmd->bo_used.list);
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cmd->cdw_bo = cmd_bo;
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break;
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default:
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mutex_lock(&dev->struct_mutex);
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drm_bo_usage_deref_locked(&cmd_bo->bo);
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mutex_unlock(&dev->struct_mutex);
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DRM_ERROR("unknow bo 0x%x unknown type 0x%x in cmd\n",
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cmd_bo->handle, cmd_bo->type);
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return -EINVAL;
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}
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/* ok next bo */
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data = drm_amd_cmd_bo.next;
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bo_count++;
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} while (data != 0);
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if (bo_count != drm_amd_cmd->bo_count) {
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DRM_ERROR("not enought buffer got %d expected %d\n.",
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bo_count, drm_amd_cmd->bo_count);
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return -EINVAL;
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}
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return 0;
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}
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static int amd_cmd_packet0_check(struct drm_device *dev,
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struct amd_cmd *cmd,
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int *cdw_id)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t reg, count, r, i;
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int ret;
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reg = cmd->cdw[*cdw_id] & PACKET0_REG_MASK;
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count = (cmd->cdw[*cdw_id] & PACKET0_COUNT_MASK) >> PACKET0_COUNT_SHIFT;
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if (reg + count > dev_priv->cmd_module.numof_p0_checkers) {
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DRM_ERROR("0x%08X registers is above last accepted registers\n",
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reg << 2);
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return -EINVAL;
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}
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for (r = reg, i = 0; i <= count; i++, r++) {
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if (dev_priv->cmd_module.check_p0[r] == NULL) {
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continue;
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}
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if (dev_priv->cmd_module.check_p0[r] == (void *)-1) {
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DRM_ERROR("register 0x%08X (at %d) is forbidden\n",
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r << 2, (*cdw_id) + i + 1);
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return -EINVAL;
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}
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ret = dev_priv->cmd_module.check_p0[r](dev, cmd,
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(*cdw_id) + i + 1, r);
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if (ret) {
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return ret;
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}
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}
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/* header + N + 1 dword passed test */
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(*cdw_id) += count + 2;
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return 0;
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}
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static int amd_cmd_packet3_check(struct drm_device *dev,
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struct amd_cmd *cmd,
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int *cdw_id)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t opcode, count;
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int ret;
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opcode = (cmd->cdw[*cdw_id] & PACKET3_OPCODE_MASK) >>
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PACKET3_OPCODE_SHIFT;
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if (opcode > dev_priv->cmd_module.numof_p3_checkers) {
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DRM_ERROR("0x%08X opcode is above last accepted opcodes\n",
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opcode);
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return -EINVAL;
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}
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count = (cmd->cdw[*cdw_id] & PACKET3_COUNT_MASK) >> PACKET3_COUNT_SHIFT;
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if (dev_priv->cmd_module.check_p3[opcode] == NULL) {
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DRM_ERROR("0x%08X opcode is forbidden\n", opcode);
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return -EINVAL;
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}
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ret = dev_priv->cmd_module.check_p3[opcode](dev, cmd,
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(*cdw_id) + 1, opcode,
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count);
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if (ret) {
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return ret;
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}
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/* header + N + 1 dword passed test */
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(*cdw_id) += count + 2;
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return 0;
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}
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int amd_cmd_check(struct drm_device *dev, struct amd_cmd *cmd)
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{
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uint32_t i;
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int ret;
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for (i = 0; i < cmd->cdw_count;) {
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switch (PACKET_HEADER_GET(cmd->cdw[i])) {
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case 0:
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ret = amd_cmd_packet0_check(dev, cmd, &i);
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if (ret) {
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return ret;
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}
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break;
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case 1:
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/* we don't accept packet 1 */
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return -EINVAL;
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case 2:
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/* FIXME: accept packet 2 */
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return -EINVAL;
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case 3:
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ret = amd_cmd_packet3_check(dev, cmd, &i);
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if (ret) {
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return ret;
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}
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break;
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}
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}
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return 0;
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}
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static int amd_ioctl_cmd_cleanup(struct drm_device *dev,
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struct drm_file *file,
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struct amd_cmd *cmd,
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int r)
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{
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/* check if we need to unfence object */
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if (r && (!list_empty(&cmd->bo_unused.list) ||
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!list_empty(&cmd->bo_unused.list))) {
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drm_putback_buffer_objects(dev);
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}
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if (cmd->cdw) {
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drm_bo_kunmap(&cmd->cdw_kmap);
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cmd->cdw = NULL;
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}
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/* derefence buffer as lookup reference them */
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amd_cmd_bo_cleanup(dev, cmd);
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if (cmd->bo) {
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drm_free(cmd->bo,
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cmd->bo_count * sizeof(struct amd_cmd_bo),
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DRM_MEM_DRIVER);
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cmd->bo = NULL;
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}
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drm_bo_read_unlock(&dev->bm.bm_lock);
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return r;
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}
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int amd_ioctl_cmd(struct drm_device *dev, void *data, struct drm_file *file)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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struct drm_amd_cmd *drm_amd_cmd = data;
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struct drm_fence_arg *fence_arg = &drm_amd_cmd->fence_arg;
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struct drm_fence_object *fence;
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struct amd_cmd cmd;
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int tmp;
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int ret;
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/* check that we have a command checker */
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if (dev_priv->cmd_module.check == NULL) {
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DRM_ERROR("invalid command checker module.\n");
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return -EFAULT;
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}
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/* command dword count must be >= 0 */
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if (drm_amd_cmd->cdw_count == 0) {
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DRM_ERROR("command dword count is 0.\n");
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return -EINVAL;
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}
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/* FIXME: Lock buffer manager. This is needed so the X server can
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* block DRI clients while VT switched. The X server will then
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* take the lock in write mode
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*/
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ret = drm_bo_read_lock(&dev->bm.bm_lock, 1);
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if (ret) {
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/* FIXME: ret can be -EAGAIN here,
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* which really isn't an error.
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*/
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DRM_ERROR("bo read locking failed.\n");
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return ret;
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}
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/* cleanup & initialize amd cmd structure */
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memset(&cmd, 0, sizeof(struct amd_cmd));
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cmd.bo_count = drm_amd_cmd->bo_count;
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INIT_LIST_HEAD(&cmd.bo_unused.list);
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INIT_LIST_HEAD(&cmd.bo_used.list);
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/* allocate structure for bo parsing */
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cmd.bo = drm_calloc(cmd.bo_count, sizeof(struct amd_cmd_bo),
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DRM_MEM_DRIVER);
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if (cmd.bo == NULL) {
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, -ENOMEM);
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}
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/* parse cmd bo */
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ret = amd_cmd_parse_cmd_bo(dev, file, drm_amd_cmd, &cmd);
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if (ret) {
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, ret);
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}
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/* check that a command buffer have been found */
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if (cmd.cdw_bo == NULL) {
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DRM_ERROR("no command buffer submited in cmd ioctl\n");
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, -EINVAL);
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}
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/* map command buffer */
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cmd.cdw_count = drm_amd_cmd->cdw_count;
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cmd.cdw_size = (cmd.cdw_bo->bo->mem.num_pages * PAGE_SIZE) >> 2;
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if (cmd.cdw_size < cmd.cdw_count) {
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DRM_ERROR("command buffer (%d) is smaller than expected (%d)\n",
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cmd.cdw_size, cmd.cdw_count);
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, -EINVAL);
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}
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memset(&cmd.cdw_kmap, 0, sizeof(struct drm_bo_kmap_obj));
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ret = drm_bo_kmap(cmd.cdw_bo->bo, 0,
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cmd.cdw_bo->bo->mem.num_pages, &cmd.cdw_kmap);
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if (ret) {
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DRM_ERROR("error mapping command buffer\n");
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, ret);
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}
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cmd.cdw = drm_bmo_virtual(&cmd.cdw_kmap, &tmp);
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/* do command checking */
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ret = dev_priv->cmd_module.check(dev, &cmd);
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if (ret) {
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, ret);
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}
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/* copy command to ring */
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ret = radeon_ms_ring_emit(dev, cmd.cdw, cmd.cdw_count);
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if (ret) {
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, ret);
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}
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/* fence */
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ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
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if (ret) {
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, ret);
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}
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if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
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ret = drm_fence_add_user_object(file, fence,
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fence_arg->flags &
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DRM_FENCE_FLAG_SHAREABLE);
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if (!ret) {
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fence_arg->handle = fence->base.hash.key;
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fence_arg->fence_class = fence->fence_class;
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fence_arg->type = fence->type;
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fence_arg->signaled = fence->signaled_types;
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fence_arg->sequence = fence->sequence;
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} else {
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DRM_ERROR("error add object fence, expect oddity !\n");
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}
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}
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drm_fence_usage_deref_unlocked(&fence);
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return amd_ioctl_cmd_cleanup(dev, file, &cmd, 0);
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}
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