144 lines
4.8 KiB
C
144 lines
4.8 KiB
C
/* i830.h -- Intel I830 DRM template customization -*- linux-c -*-
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* Created: Thu Feb 15 00:01:12 2001 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*/
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#ifndef __I830_H__
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#define __I830_H__
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/* This remains constant for all DRM template files.
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*/
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#define DRM(x) i830_##x
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/* General customization:
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*/
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#define __HAVE_AGP 1
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#define __MUST_HAVE_AGP 1
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#define __HAVE_MTRR 1
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#define __HAVE_CTX_BITMAP 1
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#define DRIVER_AUTHOR "VA Linux Systems Inc."
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#define DRIVER_NAME "i830"
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#define DRIVER_DESC "Intel 830M"
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#define DRIVER_DATE "20011004"
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 2
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#define DRIVER_PATCHLEVEL 0
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#define DRIVER_IOCTLS \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_INIT)] = { i830_dma_init, 1, 1 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_VERTEX)] = { i830_dma_vertex, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_CLEAR)] = { i830_clear_bufs, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_FLUSH)] = { i830_flush_ioctl, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_GETAGE)] = { i830_getage, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_GETBUF)] = { i830_getbuf, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_SWAP)] = { i830_swap_bufs, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_COPY)] = { i830_copybuf, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_I830_DOCOPY)] = { i830_docopy, 1, 0 },
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#define __HAVE_COUNTERS 4
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#define __HAVE_COUNTER6 _DRM_STAT_IRQ
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#define __HAVE_COUNTER7 _DRM_STAT_PRIMARY
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#define __HAVE_COUNTER8 _DRM_STAT_SECONDARY
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#define __HAVE_COUNTER9 _DRM_STAT_DMA
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/* Driver customization:
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*/
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#define __HAVE_RELEASE 1
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#define DRIVER_RELEASE() do { \
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i830_reclaim_buffers( dev, priv->pid ); \
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} while (0)
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_DMA_QUEUE 1
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#define __HAVE_DMA_WAITLIST 1
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#define __HAVE_DMA_RECLAIM 1
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#define __HAVE_DMA_QUIESCENT 1
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#define DRIVER_DMA_QUIESCENT() do { \
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i830_dma_quiescent( dev ); \
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} while (0)
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_DMA_IRQ_BH 1
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#define __HAVE_SHARED_IRQ 1
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#define DRIVER_PREINSTALL() do { \
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drm_i830_private_t *dev_priv = \
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(drm_i830_private_t *)dev->dev_private; \
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u16 tmp; \
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tmp = I830_READ16( I830REG_HWSTAM ); \
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tmp = tmp & 0x6000; \
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I830_WRITE16( I830REG_HWSTAM, tmp ); \
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\
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tmp = I830_READ16( I830REG_INT_MASK_R ); \
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tmp = tmp & 0x6000; /* Unmask interrupts */ \
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I830_WRITE16( I830REG_INT_MASK_R, tmp ); \
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tmp = I830_READ16( I830REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; /* Disable all interrupts */ \
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I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \
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} while (0)
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#define DRIVER_POSTINSTALL() do { \
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drm_i830_private_t *dev_priv = \
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(drm_i830_private_t *)dev->dev_private; \
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u16 tmp; \
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tmp = I830_READ16( I830REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; \
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tmp = tmp | 0x0003; /* Enable bp & user interrupts */ \
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I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \
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} while (0)
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#define DRIVER_UNINSTALL() do { \
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drm_i830_private_t *dev_priv = \
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(drm_i830_private_t *)dev->dev_private; \
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u16 tmp; \
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if ( dev_priv ) { \
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tmp = I830_READ16( I830REG_INT_IDENTITY_R ); \
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tmp = tmp & ~(0x6000); /* Clear all interrupts */ \
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if ( tmp != 0 ) \
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I830_WRITE16( I830REG_INT_IDENTITY_R, tmp ); \
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\
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tmp = I830_READ16( I830REG_INT_ENABLE_R ); \
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tmp = tmp & 0x6000; /* Disable all interrupts */ \
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I830_WRITE16( I830REG_INT_ENABLE_R, tmp ); \
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} \
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} while (0)
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/* Buffer customization:
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*/
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#define DRIVER_BUF_PRIV_T drm_i830_buf_priv_t
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#define DRIVER_AGP_BUFFERS_MAP( dev ) \
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((drm_i830_private_t *)((dev)->dev_private))->buffer_map
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#endif
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