119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/*
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* Copyright © 2012, 2013 Thierry Reding
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* Copyright © 2013 Erik Faye-Lund
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* Copyright © 2014 NVIDIA Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __DRM_TEGRA_PRIVATE_H__
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#define __DRM_TEGRA_PRIVATE_H__ 1
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <libdrm_macros.h>
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#include <xf86atomic.h>
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#include "tegra_drm.h"
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#include "tegra.h"
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#define container_of(ptr, type, member) ({ \
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const __typeof__(((type *)0)->member) *__mptr = (ptr); \
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(type *)((char *)__mptr - offsetof(type, member)); \
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})
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enum host1x_class {
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HOST1X_CLASS_HOST1X = 0x01,
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HOST1X_CLASS_GR2D = 0x51,
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HOST1X_CLASS_GR2D_SB = 0x52,
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HOST1X_CLASS_VIC = 0x5d,
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HOST1X_CLASS_GR3D = 0x60,
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};
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struct drm_tegra {
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bool close;
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int fd;
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};
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struct drm_tegra_bo {
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struct drm_tegra *drm;
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uint32_t handle;
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uint64_t offset;
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uint32_t flags;
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uint32_t size;
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atomic_t ref;
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void *map;
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};
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struct drm_tegra_channel {
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struct drm_tegra *drm;
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enum host1x_class class;
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uint32_t capabilities;
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unsigned int version;
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uint64_t context;
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unsigned int cond_shift;
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};
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struct drm_tegra_mapping {
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struct drm_tegra_channel *channel;
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uint32_t id;
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};
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struct drm_tegra_pushbuf {
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struct drm_tegra_job *job;
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uint32_t *start;
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uint32_t *end;
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uint32_t *ptr;
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};
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void drm_tegra_pushbuf_free(struct drm_tegra_pushbuf *pushbuf);
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struct drm_tegra_job {
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struct drm_tegra_channel *channel;
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struct drm_tegra_pushbuf *pushbuf;
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size_t page_size;
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struct drm_tegra_submit_cmd *commands;
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unsigned int num_commands;
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struct drm_tegra_submit_buf *buffers;
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unsigned int num_buffers;
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struct {
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uint32_t id;
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uint32_t increments;
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uint32_t fence;
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} syncpt;
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};
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struct drm_tegra_submit_cmd *
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drm_tegra_job_add_command(struct drm_tegra_job *job, uint32_t type,
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uint32_t flags);
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struct drm_tegra_syncpoint {
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struct drm_tegra *drm;
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uint32_t id;
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};
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#endif /* __DRM_TEGRA_PRIVATE_H__ */
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