129 lines
3.4 KiB
C
129 lines
3.4 KiB
C
/**************************************************************************
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*
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* Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*
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**************************************************************************/
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/*
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* Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_drm.h"
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#include "radeon_drv.h"
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/*
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* Implements an intel sync flush operation.
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*/
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static void radeon_perform_flush(drm_device_t * dev)
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{
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drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
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drm_fence_manager_t *fm = &dev->fm;
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drm_fence_class_manager_t *fc = &dev->fm.class[0];
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drm_fence_driver_t *driver = dev->driver->fence_driver;
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uint32_t pending_flush_types = 0;
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uint32_t flush_flags = 0;
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uint32_t flush_sequence = 0;
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uint32_t i_status;
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uint32_t diff;
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uint32_t sequence;
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if (!dev_priv)
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return;
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pending_flush_types = fc->pending_flush |
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((fc->pending_exe_flush) ? DRM_FENCE_TYPE_EXE : 0);
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if (pending_flush_types) {
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drm_fence_handler(dev, 0, 0,0);
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}
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return;
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}
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void radeon_poke_flush(drm_device_t * dev, uint32_t class)
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{
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drm_fence_manager_t *fm = &dev->fm;
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unsigned long flags;
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if (class != 0)
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return;
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write_lock_irqsave(&fm->lock, flags);
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radeon_perform_flush(dev);
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write_unlock_irqrestore(&fm->lock, flags);
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}
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int radeon_fence_emit_sequence(drm_device_t *dev, uint32_t class,
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uint32_t flags, uint32_t *sequence,
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uint32_t *native_type)
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{
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drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
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RING_LOCALS;
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if (!dev_priv)
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return -EINVAL;
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*native_type = DRM_FENCE_TYPE_EXE;
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if (flags & DRM_RADEON_FENCE_FLAG_FLUSHED) {
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*native_type |= DRM_RADEON_FENCE_TYPE_RW;
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BEGIN_RING(4);
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RADEON_FLUSH_CACHE();
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RADEON_FLUSH_ZCACHE();
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ADVANCE_RING();
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}
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radeon_emit_irq(dev);
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*sequence = (uint32_t) dev_priv->counter;
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return 0;
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}
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void radeon_fence_handler(drm_device_t * dev)
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{
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drm_fence_manager_t *fm = &dev->fm;
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write_lock(&fm->lock);
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radeon_perform_flush(dev);
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write_unlock(&fm->lock);
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}
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int radeon_fence_has_irq(drm_device_t *dev, uint32_t class, uint32_t flags)
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{
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/*
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* We have an irq that tells us when we have a new breadcrumb.
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*/
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if (class == 0 && flags == DRM_FENCE_TYPE_EXE)
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return 1;
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return 0;
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}
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