597 lines
15 KiB
C
597 lines
15 KiB
C
/* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
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*/
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/*
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* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#define MAX_NOPID ((u32)~0)
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/*
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* These are the interrupts used by the driver
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*/
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#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
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I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
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I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
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static inline void
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i915_enable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
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{
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if ((dev_priv->irq_mask_reg & mask) != 0) {
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dev_priv->irq_mask_reg &= ~mask;
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I915_WRITE(IMR, dev_priv->irq_mask_reg);
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(void) I915_READ(IMR);
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}
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}
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static inline void
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i915_disable_irq(drm_i915_private_t *dev_priv, uint32_t mask)
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{
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if ((dev_priv->irq_mask_reg & mask) != mask) {
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dev_priv->irq_mask_reg |= mask;
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I915_WRITE(IMR, dev_priv->irq_mask_reg);
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(void) I915_READ(IMR);
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}
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}
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/**
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* i915_get_pipe - return the the pipe associated with a given plane
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* @dev: DRM device
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* @plane: plane to look for
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*
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* The Intel Mesa & 2D drivers call the vblank routines with a plane number
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* rather than a pipe number, since they may not always be equal. This routine
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* maps the given @plane back to a pipe number.
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*/
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static int
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i915_get_pipe(struct drm_device *dev, int plane)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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u32 dspcntr;
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dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
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return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
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}
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/**
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* i915_get_plane - return the the plane associated with a given pipe
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* @dev: DRM device
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* @pipe: pipe to look for
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*
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* The Intel Mesa & 2D drivers call the vblank routines with a plane number
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* rather than a plane number, since they may not always be equal. This routine
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* maps the given @pipe back to a plane number.
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*/
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static int
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i915_get_plane(struct drm_device *dev, int pipe)
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{
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if (i915_get_pipe(dev, 0) == pipe)
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return 0;
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return 1;
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}
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/**
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* i915_pipe_enabled - check if a pipe is enabled
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* @dev: DRM device
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* @pipe: pipe to check
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*
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* Reading certain registers when the pipe is disabled can hang the chip.
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* Use this routine to make sure the PLL is running and the pipe is active
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* before reading such registers if unsure.
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*/
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static int
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i915_pipe_enabled(struct drm_device *dev, int pipe)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
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if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
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return 1;
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return 0;
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}
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u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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unsigned long high_frame;
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unsigned long low_frame;
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u32 high1, high2, low, count;
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int pipe;
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pipe = i915_get_pipe(dev, plane);
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high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
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low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
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if (!i915_pipe_enabled(dev, pipe)) {
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DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
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return 0;
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}
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/*
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* High & low register fields aren't synchronized, so make sure
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* we get a low value that's stable across two reads of the high
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* register.
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*/
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do {
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high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
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PIPE_FRAME_HIGH_SHIFT);
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low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
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PIPE_FRAME_LOW_SHIFT);
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high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
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PIPE_FRAME_HIGH_SHIFT);
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} while (high1 != high2);
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count = (high1 << 8) | low;
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return count;
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}
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irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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u32 iir;
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u32 pipea_stats = 0, pipeb_stats = 0;
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int vblank = 0;
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#ifdef __linux__
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if (dev->pdev->msi_enabled)
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I915_WRITE(IMR, ~0);
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#endif
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iir = I915_READ(IIR);
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#if 0
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DRM_DEBUG("flag=%08x\n", iir);
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#endif
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atomic_inc(&dev_priv->irq_received);
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if (iir == 0) {
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#ifdef __linux__
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if (dev->pdev->msi_enabled) {
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I915_WRITE(IMR, dev_priv->irq_mask_reg);
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(void) I915_READ(IMR);
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}
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#endif
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return IRQ_NONE;
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}
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/*
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* Clear the PIPE(A|B)STAT regs before the IIR otherwise
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* we may get extra interrupts.
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*/
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if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
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pipea_stats = I915_READ(PIPEASTAT);
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/* The vblank interrupt gets enabled even if we didn't ask for
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it, so make sure it's shut down again */
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if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A))
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pipea_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
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PIPE_VBLANK_INTERRUPT_ENABLE);
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else if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
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PIPE_VBLANK_INTERRUPT_STATUS))
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{
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vblank++;
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drm_handle_vblank(dev, i915_get_plane(dev, 0));
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}
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I915_WRITE(PIPEASTAT, pipea_stats);
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}
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if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
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pipeb_stats = I915_READ(PIPEBSTAT);
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/* The vblank interrupt gets enabled even if we didn't ask for
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it, so make sure it's shut down again */
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if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B))
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pipeb_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
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PIPE_VBLANK_INTERRUPT_ENABLE);
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else if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
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PIPE_VBLANK_INTERRUPT_STATUS))
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{
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vblank++;
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drm_handle_vblank(dev, i915_get_plane(dev, 1));
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}
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#ifdef __linux__
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#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
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if (pipeb_stats & I915_LEGACY_BLC_EVENT_ENABLE)
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opregion_asle_intr(dev);
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#endif
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#endif
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I915_WRITE(PIPEBSTAT, pipeb_stats);
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}
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#ifdef __linux__
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#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
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if (iir & I915_ASLE_INTERRUPT)
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opregion_asle_intr(dev);
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#endif
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#endif
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if (dev_priv->sarea_priv)
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dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
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I915_WRITE(IIR, iir);
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#ifdef __linux__
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if (dev->pdev->msi_enabled)
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I915_WRITE(IMR, dev_priv->irq_mask_reg);
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#endif
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(void) I915_READ(IIR); /* Flush posted writes */
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if (iir & I915_USER_INTERRUPT) {
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#ifdef I915_HAVE_GEM
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dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
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#endif
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DRM_WAKEUP(&dev_priv->irq_queue);
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#ifdef I915_HAVE_FENCE
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i915_fence_handler(dev);
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#endif
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}
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return IRQ_HANDLED;
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}
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int i915_emit_irq(struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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i915_kernel_lost_context(dev);
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DRM_DEBUG("\n");
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i915_emit_breadcrumb(dev);
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BEGIN_LP_RING(2);
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OUT_RING(0);
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OUT_RING(MI_USER_INTERRUPT);
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ADVANCE_LP_RING();
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return dev_priv->counter;
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}
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void i915_user_irq_on(drm_i915_private_t *dev_priv)
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{
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DRM_SPINLOCK(&dev_priv->user_irq_lock);
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if (dev_priv->irq_enabled && (++dev_priv->user_irq_refcount == 1))
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i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
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DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
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}
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void i915_user_irq_off(drm_i915_private_t *dev_priv)
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{
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DRM_SPINLOCK(&dev_priv->user_irq_lock);
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#ifdef __linux__
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BUG_ON(dev_priv->irq_enabled && dev_priv->user_irq_refcount <= 0);
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#endif
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if (dev_priv->irq_enabled && (--dev_priv->user_irq_refcount == 0))
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i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
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DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
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}
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int i915_wait_irq(struct drm_device * dev, int irq_nr)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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int ret = 0;
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if (!dev_priv) {
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
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READ_BREADCRUMB(dev_priv));
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if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
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if (dev_priv->sarea_priv)
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dev_priv->sarea_priv->last_dispatch =
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READ_BREADCRUMB(dev_priv);
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return 0;
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}
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i915_user_irq_on(dev_priv);
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DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
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READ_BREADCRUMB(dev_priv) >= irq_nr);
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i915_user_irq_off(dev_priv);
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if (ret == -EBUSY) {
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DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
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READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
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}
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if (dev_priv->sarea_priv)
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dev_priv->sarea_priv->last_dispatch =
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READ_BREADCRUMB(dev_priv);
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return ret;
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}
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/* Needs the lock as it touches the ring.
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*/
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int i915_irq_emit(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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drm_i915_irq_emit_t *emit = data;
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int result;
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LOCK_TEST_WITH_RETURN(dev, file_priv);
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if (!dev_priv) {
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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result = i915_emit_irq(dev);
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if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
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DRM_ERROR("copy_to_user\n");
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return -EFAULT;
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}
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return 0;
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}
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/* Doesn't need the hardware lock.
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*/
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int i915_irq_wait(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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drm_i915_irq_wait_t *irqwait = data;
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if (!dev_priv) {
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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return i915_wait_irq(dev, irqwait->irq_seq);
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}
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int i915_enable_vblank(struct drm_device *dev, int plane)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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int pipe = i915_get_pipe(dev, plane);
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u32 pipestat_reg = 0;
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u32 mask_reg = 0;
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u32 pipestat;
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switch (pipe) {
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case 0:
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pipestat_reg = PIPEASTAT;
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mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
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break;
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case 1:
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pipestat_reg = PIPEBSTAT;
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mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
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break;
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default:
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DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
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pipe);
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break;
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}
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if (pipestat_reg)
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{
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pipestat = I915_READ (pipestat_reg);
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/*
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* Older chips didn't have the start vblank interrupt,
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* but
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*/
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if (IS_I965G (dev))
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pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE;
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else
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pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE;
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/*
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* Clear any pending status
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*/
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pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
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PIPE_VBLANK_INTERRUPT_STATUS);
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I915_WRITE(pipestat_reg, pipestat);
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}
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DRM_SPINLOCK(&dev_priv->user_irq_lock);
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i915_enable_irq(dev_priv, mask_reg);
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DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
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return 0;
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}
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void i915_disable_vblank(struct drm_device *dev, int plane)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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int pipe = i915_get_pipe(dev, plane);
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u32 pipestat_reg = 0;
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u32 mask_reg = 0;
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u32 pipestat;
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switch (pipe) {
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case 0:
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pipestat_reg = PIPEASTAT;
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mask_reg |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
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break;
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case 1:
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pipestat_reg = PIPEBSTAT;
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mask_reg |= I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
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break;
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default:
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DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
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pipe);
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break;
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}
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DRM_SPINLOCK(&dev_priv->user_irq_lock);
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i915_disable_irq(dev_priv, mask_reg);
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DRM_SPINUNLOCK(&dev_priv->user_irq_lock);
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if (pipestat_reg)
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{
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pipestat = I915_READ (pipestat_reg);
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pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
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PIPE_VBLANK_INTERRUPT_ENABLE);
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/*
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* Clear any pending status
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*/
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pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
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PIPE_VBLANK_INTERRUPT_STATUS);
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I915_WRITE(pipestat_reg, pipestat);
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(void) I915_READ(pipestat_reg);
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}
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}
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static void i915_enable_interrupt (struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
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dev_priv->irq_mask_reg = ~0;
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I915_WRITE(IMR, dev_priv->irq_mask_reg);
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I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
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(void) I915_READ (IER);
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#ifdef __linux__
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#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,25)
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opregion_enable_asle(dev);
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#endif
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#endif
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dev_priv->irq_enabled = 1;
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}
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/* Set the vblank monitor pipe
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*/
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int i915_vblank_pipe_set(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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if (!dev_priv) {
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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return 0;
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}
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int i915_vblank_pipe_get(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
drm_i915_vblank_pipe_t *pipe = data;
|
|
|
|
if (!dev_priv) {
|
|
DRM_ERROR("called with no initialization\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Schedule buffer swap at given vertical blank.
|
|
*/
|
|
int i915_vblank_swap(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv)
|
|
{
|
|
/* The delayed swap mechanism was fundamentally racy, and has been
|
|
* removed. The model was that the client requested a delayed flip/swap
|
|
* from the kernel, then waited for vblank before continuing to perform
|
|
* rendering. The problem was that the kernel might wake the client
|
|
* up before it dispatched the vblank swap (since the lock has to be
|
|
* held while touching the ringbuffer), in which case the client would
|
|
* clear and start the next frame before the swap occurred, and
|
|
* flicker would occur in addition to likely missing the vblank.
|
|
*
|
|
* In the absence of this ioctl, userland falls back to a correct path
|
|
* of waiting for a vblank, then dispatching the swap on its own.
|
|
* Context switching to userland and back is plenty fast enough for
|
|
* meeting the requirements of vblank swapping.
|
|
*/
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* drm_dma.h hooks
|
|
*/
|
|
void i915_driver_irq_preinstall(struct drm_device * dev)
|
|
{
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
|
|
|
I915_WRITE(HWSTAM, 0xeffe);
|
|
I915_WRITE(IMR, 0xffffffff);
|
|
I915_WRITE(IER, 0x0);
|
|
}
|
|
|
|
int i915_driver_irq_postinstall(struct drm_device * dev)
|
|
{
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
|
int ret, num_pipes = 2;
|
|
|
|
dev_priv->user_irq_refcount = 0;
|
|
dev_priv->irq_mask_reg = ~0;
|
|
|
|
ret = drm_vblank_init(dev, num_pipes);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
|
|
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
|
|
|
|
i915_enable_interrupt(dev);
|
|
DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
|
|
|
|
/*
|
|
* Initialize the hardware status page IRQ location.
|
|
*/
|
|
|
|
I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
|
|
return 0;
|
|
}
|
|
|
|
void i915_driver_irq_uninstall(struct drm_device * dev)
|
|
{
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
|
u32 temp;
|
|
|
|
if (!dev_priv)
|
|
return;
|
|
|
|
dev_priv->vblank_pipe = 0;
|
|
|
|
dev_priv->irq_enabled = 0;
|
|
I915_WRITE(HWSTAM, 0xffffffff);
|
|
I915_WRITE(IMR, 0xffffffff);
|
|
I915_WRITE(IER, 0x0);
|
|
|
|
temp = I915_READ(PIPEASTAT);
|
|
I915_WRITE(PIPEASTAT, temp);
|
|
temp = I915_READ(PIPEBSTAT);
|
|
I915_WRITE(PIPEBSTAT, temp);
|
|
temp = I915_READ(IIR);
|
|
I915_WRITE(IIR, temp);
|
|
}
|