152 lines
3.5 KiB
C
152 lines
3.5 KiB
C
/*
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* Copyright (C) 2005-2006 Erik Waling
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* Copyright (C) 2006 Stephane Marchesin
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* Copyright (C) 2007-2008 Stuart Bennett
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* Copyright (C) 2008 Maarten Maathuis.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NOUVEAU_BIOS_H__
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#define __NOUVEAU_BIOS_H__
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#include "drmP.h"
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#include "drm.h"
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#define LOC_ON_CHIP 0
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enum dcb_output_type {/* matches DCB types */
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DCB_OUTPUT_NONE = 4,
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DCB_OUTPUT_ANALOG = 0,
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DCB_OUTPUT_TMDS = 2,
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DCB_OUTPUT_LVDS = 3,
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DCB_OUTPUT_TV = 1,
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};
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struct bios {
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uint8_t *data;
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unsigned int length;
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bool execute;
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uint8_t major_version, chip_version;
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uint8_t feature_byte;
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uint32_t fmaxvco, fminvco;
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uint32_t dactestval;
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uint16_t init_script_tbls_ptr;
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uint16_t extra_init_script_tbl_ptr;
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uint16_t macro_index_tbl_ptr;
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uint16_t macro_tbl_ptr;
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uint16_t condition_tbl_ptr;
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uint16_t io_condition_tbl_ptr;
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uint16_t io_flag_condition_tbl_ptr;
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uint16_t init_function_tbl_ptr;
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uint16_t pll_limit_tbl_ptr;
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uint16_t ram_restrict_tbl_ptr;
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struct {
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struct nouveau_hw_mode *native_mode;
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uint8_t *edid;
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uint16_t lvdsmanufacturerpointer;
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uint16_t xlated_entry;
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bool power_off_for_reset;
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bool reset_after_pclk_change;
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bool dual_link;
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bool link_c_increment;
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bool if_is_24bit;
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bool BITbit1;
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int duallink_transition_clk;
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/* lower nibble stores PEXTDEV_BOOT_0 strap
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* upper nibble stores xlated display strap */
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uint8_t strapping;
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} fp;
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struct {
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uint16_t output0_script_ptr;
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uint16_t output1_script_ptr;
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} tmds;
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struct {
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uint16_t mem_init_tbl_ptr;
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uint16_t sdr_seq_tbl_ptr;
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uint16_t ddr_seq_tbl_ptr;
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struct {
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uint8_t crt, tv, panel;
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} i2c_indices;
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} legacy;
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};
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struct dcb_entry {
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int index;
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uint8_t type;
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uint8_t i2c_index;
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uint8_t heads;
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uint8_t bus;
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uint8_t location;
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uint8_t or;
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bool duallink_possible;
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union {
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struct {
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bool use_straps_for_mode;
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bool use_power_scripts;
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} lvdsconf;
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};
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};
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/* changing these requires matching changes to reg tables in nv_get_clock */
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#define MAX_PLL_TYPES 4
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enum pll_types {
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NVPLL,
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MPLL,
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VPLL1,
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VPLL2
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};
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struct pll_lims {
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struct {
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int minfreq;
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int maxfreq;
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int min_inputfreq;
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int max_inputfreq;
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uint8_t min_m;
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uint8_t max_m;
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uint8_t min_n;
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uint8_t max_n;
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} vco1, vco2;
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uint8_t unk1c;
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uint8_t max_log2p_bias;
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uint8_t log2p_bias;
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int refclk;
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};
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bool get_pll_limits(struct drm_device *dev, uint32_t limit_match, struct pll_lims *pll_lim);
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int nouveau_parse_bios(struct drm_device *dev);
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#endif /* __NOUVEAU_BIOS_H__ */
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