Jerome Glisse d1fcfb17b9 radeon: force 1D array mode for z/stencil surface ... On r6xx or evergreen z/stencil surface don't support linear or linear aligned surface, force 1D tiled mode for those. Signed-off-by: Jerome Glisse <jglisse@redhat.com>		2012-06-12 18:09:55 -04:00
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Makefile.am	radeon: add r600_pci_ids.h to header file	2012-02-06 15:22:14 -05:00
bof.c	drm/radeon: add new cs command stream dumping facilities	2010-04-08 17:53:09 +02:00
bof.h	drm/radeon: add new cs command stream dumping facilities	2010-04-08 17:53:09 +02:00
libdrm_radeon.pc.in	Install headers to $(includedir)/libdrm	2010-03-17 12:45:46 -07:00
r600_pci_ids.h	radeon: add new pci ids	2012-06-05 10:07:15 -04:00
radeon_bo.c	radeon: indentation & trailing space cleanup	2010-01-14 11:24:16 +01:00
radeon_bo.h	radeon: add square-tiling flag	2010-02-18 06:14:55 +01:00
radeon_bo_gem.c	radeon: silence valgrind warnings by zeroing memory	2010-12-02 04:17:18 +01:00
radeon_bo_gem.h	libdrm_radeon: Optimize cs_gem_reloc to do less looping.	2010-03-17 12:42:21 +02:00
radeon_bo_int.h	radeon: indentation & trailing space cleanup	2010-01-14 11:24:16 +01:00
radeon_cs.c	libdrm_radeon: Optimize cs_gem_reloc to do less looping.	2010-03-17 12:42:21 +02:00
radeon_cs.h	radeon: use the const qualifier in radeon_cs_write_table	2010-04-26 20:09:34 +02:00
radeon_cs_gem.c	radeon: silence valgrind warnings by zeroing memory	2010-12-02 04:17:18 +01:00
radeon_cs_gem.h	radeon: indentation & trailing space cleanup	2010-01-14 11:24:16 +01:00
radeon_cs_int.h	libdrm_radeon: Optimize cs_gem_reloc to do less looping.	2010-03-17 12:42:21 +02:00
radeon_cs_space.c	radeon_cs_setup_bo: Fix accounting if caller specified write and read domains.	2012-02-08 10:50:55 +01:00
radeon_surface.c	radeon: force 1D array mode for z/stencil surface	2012-06-12 18:09:55 -04:00
radeon_surface.h	radeon: fix surface API for good before anyone start relying on it	2012-02-03 14:42:47 -05:00