1223 lines
32 KiB
C
1223 lines
32 KiB
C
/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
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* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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* Keith Whitwell <keithw@valinux.com>
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*
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*/
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#define __NO_VERSION__
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#include "i810.h"
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#include "drmP.h"
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#include "i810_drv.h"
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#include <linux/interrupt.h> /* For task queue support */
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/* in case we don't have a 2.3.99-pre6 kernel or later: */
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#ifndef VM_DONTCOPY
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#define VM_DONTCOPY 0
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#endif
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#define I810_BUF_FREE 2
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#define I810_BUF_CLIENT 1
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#define I810_BUF_HARDWARE 0
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#define I810_BUF_UNMAPPED 0
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#define I810_BUF_MAPPED 1
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#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt;
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#define BEGIN_LP_RING(n) do { \
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if (I810_VERBOSE) \
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DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \
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n, __FUNCTION__); \
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if (dev_priv->ring.space < n*4) \
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i810_wait_ring(dev, n*4); \
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dev_priv->ring.space -= n*4; \
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outring = dev_priv->ring.tail; \
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ringmask = dev_priv->ring.tail_mask; \
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virt = dev_priv->ring.virtual_start; \
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} while (0)
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#define ADVANCE_LP_RING() do { \
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if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \
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dev_priv->ring.tail = outring; \
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I810_WRITE(LP_RING + RING_TAIL, outring); \
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} while(0)
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#define OUT_RING(n) do { \
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if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
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*(volatile unsigned int *)(virt + outring) = n; \
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outring += 4; \
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outring &= ringmask; \
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} while (0);
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static inline void i810_print_status_page(drm_device_t *dev)
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{
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drm_device_dma_t *dma = dev->dma;
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drm_i810_private_t *dev_priv = dev->dev_private;
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u32 *temp = (u32 *)dev_priv->hw_status_page;
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int i;
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DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]);
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DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]);
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DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]);
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DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]);
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DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]);
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for(i = 6; i < dma->buf_count + 6; i++) {
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DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 6, temp[i]);
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}
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}
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static drm_buf_t *i810_freelist_get(drm_device_t *dev)
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{
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drm_device_dma_t *dma = dev->dma;
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int i;
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int used;
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/* Linear search might not be the best solution */
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for (i = 0; i < dma->buf_count; i++) {
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drm_buf_t *buf = dma->buflist[ i ];
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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/* In use is already a pointer */
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used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
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I810_BUF_CLIENT);
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if(used == I810_BUF_FREE) {
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return buf;
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}
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}
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return NULL;
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}
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/* This should only be called if the buffer is not sent to the hardware
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* yet, the hardware updates in use for us once its on the ring buffer.
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*/
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static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
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{
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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int used;
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/* In use is already a pointer */
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used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
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if(used != I810_BUF_CLIENT) {
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DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
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return -EINVAL;
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}
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return 0;
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}
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static struct file_operations i810_buffer_fops = {
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open: DRM(open),
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flush: DRM(flush),
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release: DRM(release),
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ioctl: DRM(ioctl),
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mmap: i810_mmap_buffers,
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read: DRM(read),
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fasync: DRM(fasync),
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poll: DRM(poll),
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};
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int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
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{
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drm_file_t *priv = filp->private_data;
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drm_device_t *dev;
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drm_i810_private_t *dev_priv;
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drm_buf_t *buf;
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drm_i810_buf_priv_t *buf_priv;
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lock_kernel();
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dev = priv->dev;
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dev_priv = dev->dev_private;
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buf = dev_priv->mmap_buffer;
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buf_priv = buf->dev_private;
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vma->vm_flags |= (VM_IO | VM_DONTCOPY);
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vma->vm_file = filp;
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buf_priv->currently_mapped = I810_BUF_MAPPED;
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unlock_kernel();
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if (remap_page_range(vma->vm_start,
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VM_OFFSET(vma),
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vma->vm_end - vma->vm_start,
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vma->vm_page_prot)) return -EAGAIN;
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return 0;
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}
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static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
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{
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drm_file_t *priv = filp->private_data;
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drm_device_t *dev = priv->dev;
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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drm_i810_private_t *dev_priv = dev->dev_private;
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struct file_operations *old_fops;
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int retcode = 0;
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if(buf_priv->currently_mapped == I810_BUF_MAPPED) return -EINVAL;
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if(VM_DONTCOPY != 0) {
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down(¤t->mm->mmap_sem);
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old_fops = filp->f_op;
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filp->f_op = &i810_buffer_fops;
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dev_priv->mmap_buffer = buf;
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buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total,
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PROT_READ|PROT_WRITE,
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MAP_SHARED,
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buf->bus_address);
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dev_priv->mmap_buffer = NULL;
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filp->f_op = old_fops;
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if ((unsigned long)buf_priv->virtual > -1024UL) {
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/* Real error */
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DRM_DEBUG("mmap error\n");
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retcode = (signed int)buf_priv->virtual;
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buf_priv->virtual = 0;
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}
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up(¤t->mm->mmap_sem);
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} else {
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buf_priv->virtual = buf_priv->kernel_virtual;
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buf_priv->currently_mapped = I810_BUF_MAPPED;
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}
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return retcode;
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}
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static int i810_unmap_buffer(drm_buf_t *buf)
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{
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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int retcode = 0;
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if(VM_DONTCOPY != 0) {
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if(buf_priv->currently_mapped != I810_BUF_MAPPED)
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return -EINVAL;
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down(¤t->mm->mmap_sem);
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#if LINUX_VERSION_CODE < 0x020399
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retcode = do_munmap((unsigned long)buf_priv->virtual,
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(size_t) buf->total);
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#else
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retcode = do_munmap(current->mm,
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(unsigned long)buf_priv->virtual,
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(size_t) buf->total);
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#endif
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up(¤t->mm->mmap_sem);
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}
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buf_priv->currently_mapped = I810_BUF_UNMAPPED;
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buf_priv->virtual = 0;
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return retcode;
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}
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static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d,
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struct file *filp)
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{
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drm_file_t *priv = filp->private_data;
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drm_buf_t *buf;
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drm_i810_buf_priv_t *buf_priv;
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int retcode = 0;
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buf = i810_freelist_get(dev);
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if (!buf) {
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retcode = -ENOMEM;
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DRM_DEBUG("retcode=%d\n", retcode);
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return retcode;
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}
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retcode = i810_map_buffer(buf, filp);
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if(retcode) {
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i810_freelist_put(dev, buf);
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DRM_DEBUG("mapbuf failed, retcode %d\n", retcode);
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return retcode;
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}
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buf->pid = priv->pid;
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buf_priv = buf->dev_private;
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d->granted = 1;
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d->request_idx = buf->idx;
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d->request_size = buf->total;
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d->virtual = buf_priv->virtual;
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return retcode;
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}
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static unsigned long i810_alloc_page(drm_device_t *dev)
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{
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unsigned long address;
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address = __get_free_page(GFP_KERNEL);
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if(address == 0UL)
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return 0;
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atomic_inc(&virt_to_page(address)->count);
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set_bit(PG_locked, &virt_to_page(address)->flags);
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return address;
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}
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static void i810_free_page(drm_device_t *dev, unsigned long page)
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{
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if(page == 0UL)
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return;
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atomic_dec(&virt_to_page(page)->count);
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clear_bit(PG_locked, &virt_to_page(page)->flags);
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wake_up(&virt_to_page(page)->wait);
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free_page(page);
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return;
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}
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static int i810_dma_cleanup(drm_device_t *dev)
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{
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drm_device_dma_t *dma = dev->dma;
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if(dev->dev_private) {
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int i;
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drm_i810_private_t *dev_priv =
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(drm_i810_private_t *) dev->dev_private;
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if(dev_priv->ring.virtual_start) {
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DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
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dev_priv->ring.Size);
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}
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if(dev_priv->hw_status_page != 0UL) {
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i810_free_page(dev, dev_priv->hw_status_page);
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/* Need to rewrite hardware status page */
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I810_WRITE(0x02080, 0x1ffff000);
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}
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DRM(free)(dev->dev_private, sizeof(drm_i810_private_t),
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DRM_MEM_DRIVER);
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dev->dev_private = NULL;
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for (i = 0; i < dma->buf_count; i++) {
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drm_buf_t *buf = dma->buflist[ i ];
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total);
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}
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}
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return 0;
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}
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static int i810_wait_ring(drm_device_t *dev, int n)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
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int iters = 0;
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unsigned long end;
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unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
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end = jiffies + (HZ*3);
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while (ring->space < n) {
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int i;
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ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
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ring->space = ring->head - (ring->tail+8);
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if (ring->space < 0) ring->space += ring->Size;
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if (ring->head != last_head)
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end = jiffies + (HZ*3);
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iters++;
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if((signed)(end - jiffies) <= 0) {
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DRM_ERROR("space: %d wanted %d\n", ring->space, n);
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DRM_ERROR("lockup\n");
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goto out_wait_ring;
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}
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for (i = 0 ; i < 2000 ; i++) ;
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}
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out_wait_ring:
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return iters;
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}
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static void i810_kernel_lost_context(drm_device_t *dev)
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{
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drm_i810_private_t *dev_priv = dev->dev_private;
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drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
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ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
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ring->tail = I810_READ(LP_RING + RING_TAIL);
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ring->space = ring->head - (ring->tail+8);
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if (ring->space < 0) ring->space += ring->Size;
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}
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static int i810_freelist_init(drm_device_t *dev)
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{
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drm_device_dma_t *dma = dev->dma;
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drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
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int my_idx = 24;
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u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
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int i;
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if(dma->buf_count > 1019) {
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/* Not enough space in the status page for the freelist */
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return -EINVAL;
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}
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for (i = 0; i < dma->buf_count; i++) {
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drm_buf_t *buf = dma->buflist[ i ];
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drm_i810_buf_priv_t *buf_priv = buf->dev_private;
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buf_priv->in_use = hw_status++;
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buf_priv->my_use_idx = my_idx;
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my_idx += 4;
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*buf_priv->in_use = I810_BUF_FREE;
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buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
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buf->total);
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}
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return 0;
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}
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static int i810_dma_initialize(drm_device_t *dev,
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drm_i810_private_t *dev_priv,
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drm_i810_init_t *init)
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{
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struct list_head *list;
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dev->dev_private = (void *) dev_priv;
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memset(dev_priv, 0, sizeof(drm_i810_private_t));
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list_for_each(list, &dev->maplist->head) {
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drm_map_list_t *r_list = (drm_map_list_t *)list;
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if( r_list->map &&
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r_list->map->type == _DRM_SHM &&
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r_list->map->flags & _DRM_CONTAINS_LOCK ) {
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dev_priv->sarea_map = r_list->map;
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break;
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}
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}
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DRM_FIND_MAP( dev_priv->mmio_map, init->mmio_offset );
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DRM_FIND_MAP( dev_priv->buffer_map, init->buffers_offset );
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dev_priv->sarea_priv = (drm_i810_sarea_t *)
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((u8 *)dev_priv->sarea_map->handle +
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init->sarea_priv_offset);
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atomic_set(&dev_priv->flush_done, 0);
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init_waitqueue_head(&dev_priv->flush_queue);
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dev_priv->ring.Start = init->ring_start;
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dev_priv->ring.End = init->ring_end;
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dev_priv->ring.Size = init->ring_size;
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dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
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init->ring_start,
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init->ring_size);
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dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
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if (dev_priv->ring.virtual_start == NULL) {
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i810_dma_cleanup(dev);
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DRM_ERROR("can not ioremap virtual address for"
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" ring buffer\n");
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return -ENOMEM;
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}
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dev_priv->w = init->w;
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dev_priv->h = init->h;
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dev_priv->pitch = init->pitch;
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dev_priv->back_offset = init->back_offset;
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dev_priv->depth_offset = init->depth_offset;
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dev_priv->front_di1 = init->front_offset | init->pitch_bits;
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dev_priv->back_di1 = init->back_offset | init->pitch_bits;
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dev_priv->zi1 = init->depth_offset | init->pitch_bits;
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/* Program Hardware Status Page */
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dev_priv->hw_status_page = i810_alloc_page(dev);
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memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE);
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if(dev_priv->hw_status_page == 0UL) {
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i810_dma_cleanup(dev);
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DRM_ERROR("Can not allocate hardware status page\n");
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return -ENOMEM;
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}
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DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page);
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I810_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page));
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DRM_DEBUG("Enabled hardware status page\n");
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/* Now we need to init our freelist */
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if(i810_freelist_init(dev) != 0) {
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i810_dma_cleanup(dev);
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DRM_ERROR("Not enough space in the status page for"
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" the freelist\n");
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return -ENOMEM;
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}
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return 0;
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}
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|
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int i810_dma_init(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg)
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{
|
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drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
drm_i810_private_t *dev_priv;
|
|
drm_i810_init_t init;
|
|
int retcode = 0;
|
|
|
|
if (copy_from_user(&init, (drm_i810_init_t *)arg, sizeof(init)))
|
|
return -EFAULT;
|
|
|
|
switch(init.func) {
|
|
case I810_INIT_DMA:
|
|
dev_priv = DRM(alloc)(sizeof(drm_i810_private_t),
|
|
DRM_MEM_DRIVER);
|
|
if(dev_priv == NULL) return -ENOMEM;
|
|
retcode = i810_dma_initialize(dev, dev_priv, &init);
|
|
break;
|
|
case I810_CLEANUP_DMA:
|
|
retcode = i810_dma_cleanup(dev);
|
|
break;
|
|
default:
|
|
retcode = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
return retcode;
|
|
}
|
|
|
|
|
|
|
|
/* Most efficient way to verify state for the i810 is as it is
|
|
* emitted. Non-conformant state is silently dropped.
|
|
*
|
|
* Use 'volatile' & local var tmp to force the emitted values to be
|
|
* identical to the verified ones.
|
|
*/
|
|
static void i810EmitContextVerified( drm_device_t *dev,
|
|
volatile unsigned int *code )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
int i, j = 0;
|
|
unsigned int tmp;
|
|
RING_LOCALS;
|
|
|
|
BEGIN_LP_RING( I810_CTX_SETUP_SIZE );
|
|
|
|
OUT_RING( GFX_OP_COLOR_FACTOR );
|
|
OUT_RING( code[I810_CTXREG_CF1] );
|
|
|
|
OUT_RING( GFX_OP_STIPPLE );
|
|
OUT_RING( code[I810_CTXREG_ST1] );
|
|
|
|
for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) {
|
|
tmp = code[i];
|
|
|
|
if ((tmp & (7<<29)) == (3<<29) &&
|
|
(tmp & (0x1f<<24)) < (0x1d<<24))
|
|
{
|
|
OUT_RING( tmp );
|
|
j++;
|
|
}
|
|
}
|
|
|
|
if (j & 1)
|
|
OUT_RING( 0 );
|
|
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
static void i810EmitTexVerified( drm_device_t *dev,
|
|
volatile unsigned int *code )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
int i, j = 0;
|
|
unsigned int tmp;
|
|
RING_LOCALS;
|
|
|
|
BEGIN_LP_RING( I810_TEX_SETUP_SIZE );
|
|
|
|
OUT_RING( GFX_OP_MAP_INFO );
|
|
OUT_RING( code[I810_TEXREG_MI1] );
|
|
OUT_RING( code[I810_TEXREG_MI2] );
|
|
OUT_RING( code[I810_TEXREG_MI3] );
|
|
|
|
for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) {
|
|
tmp = code[i];
|
|
|
|
if ((tmp & (7<<29)) == (3<<29) &&
|
|
(tmp & (0x1f<<24)) < (0x1d<<24))
|
|
{
|
|
OUT_RING( tmp );
|
|
j++;
|
|
}
|
|
}
|
|
|
|
if (j & 1)
|
|
OUT_RING( 0 );
|
|
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
|
|
/* Need to do some additional checking when setting the dest buffer.
|
|
*/
|
|
static void i810EmitDestVerified( drm_device_t *dev,
|
|
volatile unsigned int *code )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
unsigned int tmp;
|
|
RING_LOCALS;
|
|
|
|
BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 );
|
|
|
|
tmp = code[I810_DESTREG_DI1];
|
|
if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
|
|
OUT_RING( CMD_OP_DESTBUFFER_INFO );
|
|
OUT_RING( tmp );
|
|
} else
|
|
DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
|
|
tmp, dev_priv->front_di1, dev_priv->back_di1);
|
|
|
|
/* invarient:
|
|
*/
|
|
OUT_RING( CMD_OP_Z_BUFFER_INFO );
|
|
OUT_RING( dev_priv->zi1 );
|
|
|
|
OUT_RING( GFX_OP_DESTBUFFER_VARS );
|
|
OUT_RING( code[I810_DESTREG_DV1] );
|
|
|
|
OUT_RING( GFX_OP_DRAWRECT_INFO );
|
|
OUT_RING( code[I810_DESTREG_DR1] );
|
|
OUT_RING( code[I810_DESTREG_DR2] );
|
|
OUT_RING( code[I810_DESTREG_DR3] );
|
|
OUT_RING( code[I810_DESTREG_DR4] );
|
|
OUT_RING( 0 );
|
|
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
|
|
|
|
static void i810EmitState( drm_device_t *dev )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
|
unsigned int dirty = sarea_priv->dirty;
|
|
|
|
if (dirty & I810_UPLOAD_BUFFERS) {
|
|
i810EmitDestVerified( dev, sarea_priv->BufferState );
|
|
sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
|
|
}
|
|
|
|
if (dirty & I810_UPLOAD_CTX) {
|
|
i810EmitContextVerified( dev, sarea_priv->ContextState );
|
|
sarea_priv->dirty &= ~I810_UPLOAD_CTX;
|
|
}
|
|
|
|
if (dirty & I810_UPLOAD_TEX0) {
|
|
i810EmitTexVerified( dev, sarea_priv->TexState[0] );
|
|
sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
|
|
}
|
|
|
|
if (dirty & I810_UPLOAD_TEX1) {
|
|
i810EmitTexVerified( dev, sarea_priv->TexState[1] );
|
|
sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
/* need to verify
|
|
*/
|
|
static void i810_dma_dispatch_clear( drm_device_t *dev, int flags,
|
|
unsigned int clear_color,
|
|
unsigned int clear_zval )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
|
int nbox = sarea_priv->nbox;
|
|
drm_clip_rect_t *pbox = sarea_priv->boxes;
|
|
int pitch = dev_priv->pitch;
|
|
int cpp = 2;
|
|
int i;
|
|
RING_LOCALS;
|
|
|
|
i810_kernel_lost_context(dev);
|
|
|
|
if (nbox > I810_NR_SAREA_CLIPRECTS)
|
|
nbox = I810_NR_SAREA_CLIPRECTS;
|
|
|
|
for (i = 0 ; i < nbox ; i++, pbox++) {
|
|
unsigned int x = pbox->x1;
|
|
unsigned int y = pbox->y1;
|
|
unsigned int width = (pbox->x2 - x) * cpp;
|
|
unsigned int height = pbox->y2 - y;
|
|
unsigned int start = y * pitch + x * cpp;
|
|
|
|
if (pbox->x1 > pbox->x2 ||
|
|
pbox->y1 > pbox->y2 ||
|
|
pbox->x2 > dev_priv->w ||
|
|
pbox->y2 > dev_priv->h)
|
|
continue;
|
|
|
|
if ( flags & I810_FRONT ) {
|
|
DRM_DEBUG("clear front\n");
|
|
BEGIN_LP_RING( 6 );
|
|
OUT_RING( BR00_BITBLT_CLIENT |
|
|
BR00_OP_COLOR_BLT | 0x3 );
|
|
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
|
|
OUT_RING( (height << 16) | width );
|
|
OUT_RING( start );
|
|
OUT_RING( clear_color );
|
|
OUT_RING( 0 );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
if ( flags & I810_BACK ) {
|
|
DRM_DEBUG("clear back\n");
|
|
BEGIN_LP_RING( 6 );
|
|
OUT_RING( BR00_BITBLT_CLIENT |
|
|
BR00_OP_COLOR_BLT | 0x3 );
|
|
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
|
|
OUT_RING( (height << 16) | width );
|
|
OUT_RING( dev_priv->back_offset + start );
|
|
OUT_RING( clear_color );
|
|
OUT_RING( 0 );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
if ( flags & I810_DEPTH ) {
|
|
DRM_DEBUG("clear depth\n");
|
|
BEGIN_LP_RING( 6 );
|
|
OUT_RING( BR00_BITBLT_CLIENT |
|
|
BR00_OP_COLOR_BLT | 0x3 );
|
|
OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch );
|
|
OUT_RING( (height << 16) | width );
|
|
OUT_RING( dev_priv->depth_offset + start );
|
|
OUT_RING( clear_zval );
|
|
OUT_RING( 0 );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
}
|
|
}
|
|
|
|
static void i810_dma_dispatch_swap( drm_device_t *dev )
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
|
int nbox = sarea_priv->nbox;
|
|
drm_clip_rect_t *pbox = sarea_priv->boxes;
|
|
int pitch = dev_priv->pitch;
|
|
int cpp = 2;
|
|
int ofs = dev_priv->back_offset;
|
|
int i;
|
|
RING_LOCALS;
|
|
|
|
DRM_DEBUG("swapbuffers\n");
|
|
|
|
i810_kernel_lost_context(dev);
|
|
|
|
if (nbox > I810_NR_SAREA_CLIPRECTS)
|
|
nbox = I810_NR_SAREA_CLIPRECTS;
|
|
|
|
for (i = 0 ; i < nbox; i++, pbox++)
|
|
{
|
|
unsigned int w = pbox->x2 - pbox->x1;
|
|
unsigned int h = pbox->y2 - pbox->y1;
|
|
unsigned int dst = pbox->x1*cpp + pbox->y1*pitch;
|
|
unsigned int start = ofs + dst;
|
|
|
|
if (pbox->x1 > pbox->x2 ||
|
|
pbox->y1 > pbox->y2 ||
|
|
pbox->x2 > dev_priv->w ||
|
|
pbox->y2 > dev_priv->h)
|
|
continue;
|
|
|
|
DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
|
|
pbox[i].x1, pbox[i].y1,
|
|
pbox[i].x2, pbox[i].y2);
|
|
|
|
BEGIN_LP_RING( 6 );
|
|
OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 );
|
|
OUT_RING( pitch | (0xCC << 16));
|
|
OUT_RING( (h << 16) | (w * cpp));
|
|
OUT_RING( dst );
|
|
OUT_RING( pitch );
|
|
OUT_RING( start );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
}
|
|
|
|
|
|
static void i810_dma_dispatch_vertex(drm_device_t *dev,
|
|
drm_buf_t *buf,
|
|
int discard,
|
|
int used)
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
|
|
drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
|
drm_clip_rect_t *box = sarea_priv->boxes;
|
|
int nbox = sarea_priv->nbox;
|
|
unsigned long address = (unsigned long)buf->bus_address;
|
|
unsigned long start = address - dev->agp->base;
|
|
int i = 0, u;
|
|
RING_LOCALS;
|
|
|
|
i810_kernel_lost_context(dev);
|
|
|
|
if (nbox > I810_NR_SAREA_CLIPRECTS)
|
|
nbox = I810_NR_SAREA_CLIPRECTS;
|
|
|
|
if (discard) {
|
|
u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
|
|
I810_BUF_HARDWARE);
|
|
if(u != I810_BUF_CLIENT) {
|
|
DRM_DEBUG("xxxx 2\n");
|
|
}
|
|
}
|
|
|
|
if (used > 4*1024)
|
|
used = 0;
|
|
|
|
if (sarea_priv->dirty)
|
|
i810EmitState( dev );
|
|
|
|
DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
|
|
address, used, nbox);
|
|
|
|
dev_priv->counter++;
|
|
DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter);
|
|
DRM_DEBUG( "i810_dma_dispatch\n");
|
|
DRM_DEBUG( "start : %lx\n", start);
|
|
DRM_DEBUG( "used : %d\n", used);
|
|
DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4);
|
|
|
|
if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
|
|
*(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE |
|
|
sarea_priv->vertex_prim |
|
|
((used/4)-2));
|
|
|
|
if (used & 4) {
|
|
*(u32 *)((u32)buf_priv->virtual + used) = 0;
|
|
used += 4;
|
|
}
|
|
|
|
i810_unmap_buffer(buf);
|
|
}
|
|
|
|
if (used) {
|
|
do {
|
|
if (i < nbox) {
|
|
BEGIN_LP_RING(4);
|
|
OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
|
|
SC_ENABLE );
|
|
OUT_RING( GFX_OP_SCISSOR_INFO );
|
|
OUT_RING( box[i].x1 | (box[i].y1<<16) );
|
|
OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
BEGIN_LP_RING(4);
|
|
OUT_RING( CMD_OP_BATCH_BUFFER );
|
|
OUT_RING( start | BB1_PROTECTED );
|
|
OUT_RING( start + used - 4 );
|
|
OUT_RING( 0 );
|
|
ADVANCE_LP_RING();
|
|
|
|
} while (++i < nbox);
|
|
}
|
|
|
|
BEGIN_LP_RING(10);
|
|
OUT_RING( CMD_STORE_DWORD_IDX );
|
|
OUT_RING( 20 );
|
|
OUT_RING( dev_priv->counter );
|
|
OUT_RING( 0 );
|
|
|
|
if (discard) {
|
|
OUT_RING( CMD_STORE_DWORD_IDX );
|
|
OUT_RING( buf_priv->my_use_idx );
|
|
OUT_RING( I810_BUF_FREE );
|
|
OUT_RING( 0 );
|
|
}
|
|
|
|
OUT_RING( CMD_REPORT_HEAD );
|
|
OUT_RING( 0 );
|
|
ADVANCE_LP_RING();
|
|
}
|
|
|
|
|
|
/* Interrupts are only for flushing */
|
|
void i810_dma_service(int irq, void *device, struct pt_regs *regs)
|
|
{
|
|
drm_device_t *dev = (drm_device_t *)device;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
u16 temp;
|
|
|
|
atomic_inc(&dev->counts[_DRM_STAT_IRQ]);
|
|
temp = I810_READ16(I810REG_INT_IDENTITY_R);
|
|
temp = temp & ~(0x6000);
|
|
if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R,
|
|
temp); /* Clear all interrupts */
|
|
else
|
|
return;
|
|
|
|
queue_task(&dev->tq, &tq_immediate);
|
|
mark_bh(IMMEDIATE_BH);
|
|
}
|
|
|
|
void i810_dma_immediate_bh(void *device)
|
|
{
|
|
drm_device_t *dev = (drm_device_t *) device;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
|
|
atomic_set(&dev_priv->flush_done, 1);
|
|
wake_up_interruptible(&dev_priv->flush_queue);
|
|
}
|
|
|
|
static inline void i810_dma_emit_flush(drm_device_t *dev)
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
RING_LOCALS;
|
|
|
|
i810_kernel_lost_context(dev);
|
|
|
|
BEGIN_LP_RING(2);
|
|
OUT_RING( CMD_REPORT_HEAD );
|
|
OUT_RING( GFX_OP_USER_INTERRUPT );
|
|
ADVANCE_LP_RING();
|
|
|
|
/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
|
|
/* atomic_set(&dev_priv->flush_done, 1); */
|
|
/* wake_up_interruptible(&dev_priv->flush_queue); */
|
|
}
|
|
|
|
static inline void i810_dma_quiescent_emit(drm_device_t *dev)
|
|
{
|
|
drm_i810_private_t *dev_priv = dev->dev_private;
|
|
RING_LOCALS;
|
|
|
|
i810_kernel_lost_context(dev);
|
|
|
|
BEGIN_LP_RING(4);
|
|
OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
|
|
OUT_RING( CMD_REPORT_HEAD );
|
|
OUT_RING( 0 );
|
|
OUT_RING( GFX_OP_USER_INTERRUPT );
|
|
ADVANCE_LP_RING();
|
|
|
|
/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */
|
|
/* atomic_set(&dev_priv->flush_done, 1); */
|
|
/* wake_up_interruptible(&dev_priv->flush_queue); */
|
|
}
|
|
|
|
void i810_dma_quiescent(drm_device_t *dev)
|
|
{
|
|
DECLARE_WAITQUEUE(entry, current);
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
unsigned long end;
|
|
|
|
if(dev_priv == NULL) {
|
|
return;
|
|
}
|
|
atomic_set(&dev_priv->flush_done, 0);
|
|
add_wait_queue(&dev_priv->flush_queue, &entry);
|
|
end = jiffies + (HZ*3);
|
|
|
|
for (;;) {
|
|
current->state = TASK_INTERRUPTIBLE;
|
|
i810_dma_quiescent_emit(dev);
|
|
if (atomic_read(&dev_priv->flush_done) == 1) break;
|
|
if((signed)(end - jiffies) <= 0) {
|
|
DRM_ERROR("lockup\n");
|
|
break;
|
|
}
|
|
schedule_timeout(HZ*3);
|
|
if (signal_pending(current)) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
current->state = TASK_RUNNING;
|
|
remove_wait_queue(&dev_priv->flush_queue, &entry);
|
|
|
|
return;
|
|
}
|
|
|
|
static int i810_flush_queue(drm_device_t *dev)
|
|
{
|
|
DECLARE_WAITQUEUE(entry, current);
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
drm_device_dma_t *dma = dev->dma;
|
|
unsigned long end;
|
|
int i, ret = 0;
|
|
|
|
if(dev_priv == NULL) {
|
|
return 0;
|
|
}
|
|
atomic_set(&dev_priv->flush_done, 0);
|
|
add_wait_queue(&dev_priv->flush_queue, &entry);
|
|
end = jiffies + (HZ*3);
|
|
for (;;) {
|
|
current->state = TASK_INTERRUPTIBLE;
|
|
i810_dma_emit_flush(dev);
|
|
if (atomic_read(&dev_priv->flush_done) == 1) break;
|
|
if((signed)(end - jiffies) <= 0) {
|
|
DRM_ERROR("lockup\n");
|
|
break;
|
|
}
|
|
schedule_timeout(HZ*3);
|
|
if (signal_pending(current)) {
|
|
ret = -EINTR; /* Can't restart */
|
|
break;
|
|
}
|
|
}
|
|
|
|
current->state = TASK_RUNNING;
|
|
remove_wait_queue(&dev_priv->flush_queue, &entry);
|
|
|
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
|
drm_buf_t *buf = dma->buflist[ i ];
|
|
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
|
|
I810_BUF_FREE);
|
|
|
|
if (used == I810_BUF_HARDWARE)
|
|
DRM_DEBUG("reclaimed from HARDWARE\n");
|
|
if (used == I810_BUF_CLIENT)
|
|
DRM_DEBUG("still on client HARDWARE\n");
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Must be called with the lock held */
|
|
void i810_reclaim_buffers(drm_device_t *dev, pid_t pid)
|
|
{
|
|
drm_device_dma_t *dma = dev->dma;
|
|
int i;
|
|
|
|
if (!dma) return;
|
|
if (!dev->dev_private) return;
|
|
if (!dma->buflist) return;
|
|
|
|
i810_flush_queue(dev);
|
|
|
|
for (i = 0; i < dma->buf_count; i++) {
|
|
drm_buf_t *buf = dma->buflist[ i ];
|
|
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
if (buf->pid == pid && buf_priv) {
|
|
int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
|
|
I810_BUF_FREE);
|
|
|
|
if (used == I810_BUF_CLIENT)
|
|
DRM_DEBUG("reclaimed from client\n");
|
|
if(buf_priv->currently_mapped == I810_BUF_MAPPED)
|
|
buf_priv->currently_mapped = I810_BUF_UNMAPPED;
|
|
}
|
|
}
|
|
}
|
|
|
|
int i810_flush_ioctl(struct inode *inode, struct file *filp,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
|
|
DRM_DEBUG("i810_flush_ioctl\n");
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_flush_ioctl called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
i810_flush_queue(dev);
|
|
return 0;
|
|
}
|
|
|
|
|
|
int i810_dma_vertex(struct inode *inode, struct file *filp,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
drm_device_dma_t *dma = dev->dma;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
|
|
drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
|
|
dev_priv->sarea_priv;
|
|
drm_i810_vertex_t vertex;
|
|
|
|
if (copy_from_user(&vertex, (drm_i810_vertex_t *)arg, sizeof(vertex)))
|
|
return -EFAULT;
|
|
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_dma_vertex called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
|
|
vertex.idx, vertex.used, vertex.discard);
|
|
|
|
i810_dma_dispatch_vertex( dev,
|
|
dma->buflist[ vertex.idx ],
|
|
vertex.discard, vertex.used );
|
|
|
|
atomic_add(vertex.used, &dev->counts[_DRM_STAT_SECONDARY]);
|
|
atomic_inc(&dev->counts[_DRM_STAT_DMA]);
|
|
sarea_priv->last_enqueue = dev_priv->counter-1;
|
|
sarea_priv->last_dispatch = (int) hw_status[5];
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
int i810_clear_bufs(struct inode *inode, struct file *filp,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
drm_i810_clear_t clear;
|
|
|
|
if (copy_from_user(&clear, (drm_i810_clear_t *)arg, sizeof(clear)))
|
|
return -EFAULT;
|
|
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_clear_bufs called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
i810_dma_dispatch_clear( dev, clear.flags,
|
|
clear.clear_color,
|
|
clear.clear_depth );
|
|
return 0;
|
|
}
|
|
|
|
int i810_swap_bufs(struct inode *inode, struct file *filp,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
|
|
DRM_DEBUG("i810_swap_bufs\n");
|
|
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_swap_buf called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
i810_dma_dispatch_swap( dev );
|
|
return 0;
|
|
}
|
|
|
|
int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
|
|
drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
|
|
dev_priv->sarea_priv;
|
|
|
|
sarea_priv->last_dispatch = (int) hw_status[5];
|
|
return 0;
|
|
}
|
|
|
|
int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
int retcode = 0;
|
|
drm_i810_dma_t d;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
|
|
drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
|
|
dev_priv->sarea_priv;
|
|
|
|
DRM_DEBUG("getbuf\n");
|
|
if (copy_from_user(&d, (drm_i810_dma_t *)arg, sizeof(d)))
|
|
return -EFAULT;
|
|
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_dma called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
d.granted = 0;
|
|
|
|
retcode = i810_dma_get_buffer(dev, &d, filp);
|
|
|
|
DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
|
|
current->pid, retcode, d.granted);
|
|
|
|
if (copy_to_user((drm_dma_t *)arg, &d, sizeof(d)))
|
|
return -EFAULT;
|
|
sarea_priv->last_dispatch = (int) hw_status[5];
|
|
|
|
return retcode;
|
|
}
|
|
|
|
int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
drm_file_t *priv = filp->private_data;
|
|
drm_device_t *dev = priv->dev;
|
|
drm_i810_copy_t d;
|
|
drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private;
|
|
u32 *hw_status = (u32 *)dev_priv->hw_status_page;
|
|
drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
|
|
dev_priv->sarea_priv;
|
|
drm_buf_t *buf;
|
|
drm_i810_buf_priv_t *buf_priv;
|
|
drm_device_dma_t *dma = dev->dma;
|
|
|
|
if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
|
DRM_ERROR("i810_dma called without lock held\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (copy_from_user(&d, (drm_i810_copy_t *)arg, sizeof(d)))
|
|
return -EFAULT;
|
|
|
|
if(d.idx > dma->buf_count) return -EINVAL;
|
|
buf = dma->buflist[ d.idx ];
|
|
buf_priv = buf->dev_private;
|
|
if (buf_priv->currently_mapped != I810_BUF_MAPPED) return -EPERM;
|
|
|
|
if (copy_from_user(buf_priv->virtual, d.address, d.used))
|
|
return -EFAULT;
|
|
|
|
sarea_priv->last_dispatch = (int) hw_status[5];
|
|
|
|
return 0;
|
|
}
|
|
|
|
int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
if(VM_DONTCOPY == 0) return 1;
|
|
return 0;
|
|
}
|