591 lines
20 KiB
C
591 lines
20 KiB
C
/*
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* Copyright 2005 Stephane Marchesin.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NOUVEAU_DRV_H__
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#define __NOUVEAU_DRV_H__
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#define DRIVER_AUTHOR "Stephane Marchesin"
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#define DRIVER_EMAIL "dri-devel@lists.sourceforge.net"
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#define DRIVER_NAME "nouveau"
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#define DRIVER_DESC "nVidia Riva/TNT/GeForce"
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#define DRIVER_DATE "20060213"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 10
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#define NOUVEAU_FAMILY 0x0000FFFF
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#define NOUVEAU_FLAGS 0xFFFF0000
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#include "nouveau_drm.h"
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#include "nouveau_reg.h"
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struct mem_block {
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struct mem_block *next;
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struct mem_block *prev;
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uint64_t start;
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uint64_t size;
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struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
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int flags;
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drm_local_map_t *map;
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drm_handle_t map_handle;
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};
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enum nouveau_flags {
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NV_NFORCE =0x10000000,
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NV_NFORCE2 =0x20000000
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};
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#define NVOBJ_ENGINE_SW 0
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#define NVOBJ_ENGINE_GR 1
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#define NVOBJ_ENGINE_INT 0xdeadbeef
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#define NVOBJ_FLAG_ALLOW_NO_REFS (1 << 0)
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#define NVOBJ_FLAG_ZERO_ALLOC (1 << 1)
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#define NVOBJ_FLAG_ZERO_FREE (1 << 2)
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#define NVOBJ_FLAG_FAKE (1 << 3)
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struct nouveau_gpuobj {
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struct list_head list;
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int im_channel;
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struct mem_block *im_pramin;
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struct mem_block *im_backing;
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int im_bound;
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uint32_t flags;
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int refcount;
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uint32_t engine;
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uint32_t class;
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void (*dtor)(struct drm_device *, struct nouveau_gpuobj *);
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void *priv;
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};
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struct nouveau_gpuobj_ref {
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struct list_head list;
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struct nouveau_gpuobj *gpuobj;
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uint32_t instance;
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int channel;
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int handle;
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};
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struct nouveau_channel
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{
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struct drm_device *dev;
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int id;
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/* owner of this fifo */
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struct drm_file *file_priv;
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/* mapping of the fifo itself */
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drm_local_map_t *map;
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/* mapping of the regs controling the fifo */
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drm_local_map_t *regs;
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/* DMA push buffer */
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struct nouveau_gpuobj_ref *pushbuf;
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struct mem_block *pushbuf_mem;
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uint32_t pushbuf_base;
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/* Notifier memory */
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struct mem_block *notifier_block;
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struct mem_block *notifier_heap;
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drm_local_map_t *notifier_map;
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/* PFIFO context */
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struct nouveau_gpuobj_ref *ramfc;
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/* PGRAPH context */
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/* XXX may be merge 2 pointers as private data ??? */
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struct nouveau_gpuobj_ref *ramin_grctx;
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void *pgraph_ctx;
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/* NV50 VM */
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struct nouveau_gpuobj *vm_pd;
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struct nouveau_gpuobj_ref *vm_gart_pt;
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/* Objects */
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struct nouveau_gpuobj_ref *ramin; /* Private instmem */
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struct mem_block *ramin_heap; /* Private PRAMIN heap */
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struct nouveau_gpuobj_ref *ramht; /* Hash table */
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struct list_head ramht_refs; /* Objects referenced by RAMHT */
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};
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struct nouveau_drm_channel {
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struct nouveau_channel *chan;
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/* DMA state */
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int max, put, cur, free;
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int push_free;
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volatile uint32_t *pushbuf;
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/* Notifiers */
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uint32_t notify0_offset;
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/* Fences */
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uint32_t next_sequence;
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/* Buffer moves */
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uint32_t m2mf_dma_source;
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uint32_t m2mf_dma_destin;
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};
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struct nouveau_config {
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struct {
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int location;
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int size;
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} cmdbuf;
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};
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struct nouveau_instmem_engine {
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void *priv;
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int (*init)(struct drm_device *dev);
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void (*takedown)(struct drm_device *dev);
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int (*populate)(struct drm_device *, struct nouveau_gpuobj *,
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uint32_t *size);
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void (*clear)(struct drm_device *, struct nouveau_gpuobj *);
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int (*bind)(struct drm_device *, struct nouveau_gpuobj *);
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int (*unbind)(struct drm_device *, struct nouveau_gpuobj *);
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};
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struct nouveau_mc_engine {
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int (*init)(struct drm_device *dev);
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void (*takedown)(struct drm_device *dev);
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};
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struct nouveau_timer_engine {
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int (*init)(struct drm_device *dev);
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void (*takedown)(struct drm_device *dev);
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uint64_t (*read)(struct drm_device *dev);
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};
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struct nouveau_fb_engine {
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int (*init)(struct drm_device *dev);
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void (*takedown)(struct drm_device *dev);
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};
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struct nouveau_fifo_engine {
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void *priv;
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int (*init)(struct drm_device *);
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void (*takedown)(struct drm_device *);
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int (*create_context)(struct nouveau_channel *);
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void (*destroy_context)(struct nouveau_channel *);
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int (*load_context)(struct nouveau_channel *);
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int (*save_context)(struct nouveau_channel *);
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};
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struct nouveau_pgraph_engine {
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int (*init)(struct drm_device *);
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void (*takedown)(struct drm_device *);
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int (*create_context)(struct nouveau_channel *);
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void (*destroy_context)(struct nouveau_channel *);
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int (*load_context)(struct nouveau_channel *);
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int (*save_context)(struct nouveau_channel *);
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};
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struct nouveau_engine {
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struct nouveau_instmem_engine instmem;
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struct nouveau_mc_engine mc;
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struct nouveau_timer_engine timer;
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struct nouveau_fb_engine fb;
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struct nouveau_pgraph_engine graph;
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struct nouveau_fifo_engine fifo;
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};
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struct drm_nouveau_private {
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enum {
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NOUVEAU_CARD_INIT_DOWN,
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NOUVEAU_CARD_INIT_DONE,
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NOUVEAU_CARD_INIT_FAILED
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} init_state;
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int ttm;
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/* the card type, takes NV_* as values */
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int card_type;
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/* exact chipset, derived from NV_PMC_BOOT_0 */
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int chipset;
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int flags;
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drm_local_map_t *mmio;
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drm_local_map_t *fb;
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drm_local_map_t *ramin; /* NV40 onwards */
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int fifo_alloc_count;
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struct nouveau_channel *fifos[NV_MAX_FIFO_NUMBER];
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struct nouveau_engine Engine;
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struct nouveau_drm_channel channel;
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/* RAMIN configuration, RAMFC, RAMHT and RAMRO offsets */
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struct nouveau_gpuobj *ramht;
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uint32_t ramin_rsvd_vram;
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uint32_t ramht_offset;
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uint32_t ramht_size;
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uint32_t ramht_bits;
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uint32_t ramfc_offset;
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uint32_t ramfc_size;
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uint32_t ramro_offset;
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uint32_t ramro_size;
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/* base physical adresses */
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uint64_t fb_phys;
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uint64_t fb_available_size;
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struct {
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enum {
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NOUVEAU_GART_NONE = 0,
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NOUVEAU_GART_AGP,
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NOUVEAU_GART_SGDMA
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} type;
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uint64_t aper_base;
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uint64_t aper_size;
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struct nouveau_gpuobj *sg_ctxdma;
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struct page *sg_dummy_page;
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dma_addr_t sg_dummy_bus;
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/* nottm hack */
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struct drm_ttm_backend *sg_be;
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unsigned long sg_handle;
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} gart_info;
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/* the mtrr covering the FB */
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int fb_mtrr;
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struct mem_block *agp_heap;
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struct mem_block *fb_heap;
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struct mem_block *fb_nomap_heap;
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struct mem_block *ramin_heap;
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struct mem_block *pci_heap;
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/* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
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uint32_t ctx_table_size;
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struct nouveau_gpuobj_ref *ctx_table;
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struct nouveau_config config;
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struct list_head gpuobj_list;
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};
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#define NOUVEAU_CHECK_INITIALISED_WITH_RETURN do { \
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struct drm_nouveau_private *nv = dev->dev_private; \
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if (nv->init_state != NOUVEAU_CARD_INIT_DONE) { \
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DRM_ERROR("called without init\n"); \
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return -EINVAL; \
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} \
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} while(0)
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#define NOUVEAU_GET_USER_CHANNEL_WITH_RETURN(id,cl,ch) do { \
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struct drm_nouveau_private *nv = dev->dev_private; \
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if (!nouveau_fifo_owner(dev, (cl), (id))) { \
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DRM_ERROR("pid %d doesn't own channel %d\n", \
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DRM_CURRENTPID, (id)); \
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return -EPERM; \
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} \
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(ch) = nv->fifos[(id)]; \
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} while(0)
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/* nouveau_state.c */
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extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
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extern int nouveau_load(struct drm_device *, unsigned long flags);
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extern int nouveau_firstopen(struct drm_device *);
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extern void nouveau_lastclose(struct drm_device *);
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extern int nouveau_unload(struct drm_device *);
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extern int nouveau_ioctl_getparam(struct drm_device *, void *data,
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struct drm_file *);
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extern int nouveau_ioctl_setparam(struct drm_device *, void *data,
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struct drm_file *);
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extern void nouveau_wait_for_idle(struct drm_device *);
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extern int nouveau_card_init(struct drm_device *);
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extern int nouveau_ioctl_card_init(struct drm_device *, void *data,
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struct drm_file *);
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/* nouveau_mem.c */
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extern int nouveau_mem_init_heap(struct mem_block **, uint64_t start,
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uint64_t size);
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extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *,
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uint64_t size, int align2,
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struct drm_file *);
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extern void nouveau_mem_takedown(struct mem_block **heap);
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extern void nouveau_mem_free_block(struct mem_block *);
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extern uint64_t nouveau_mem_fb_amount(struct drm_device *);
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extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
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extern int nouveau_ioctl_mem_alloc(struct drm_device *, void *data,
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struct drm_file *);
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extern int nouveau_ioctl_mem_free(struct drm_device *, void *data,
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struct drm_file *);
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extern struct mem_block* nouveau_mem_alloc(struct drm_device *,
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int alignment, uint64_t size,
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int flags, struct drm_file *);
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extern void nouveau_mem_free(struct drm_device *dev, struct mem_block*);
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extern int nouveau_mem_init(struct drm_device *);
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extern int nouveau_mem_init_ttm(struct drm_device *);
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extern void nouveau_mem_close(struct drm_device *);
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/* nouveau_notifier.c */
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extern int nouveau_notifier_init_channel(struct nouveau_channel *);
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extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
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extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
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int cout, uint32_t *offset);
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extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
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struct drm_file *);
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extern int nouveau_ioctl_notifier_free(struct drm_device *, void *data,
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struct drm_file *);
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/* nouveau_fifo.c */
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extern int nouveau_fifo_init(struct drm_device *);
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extern int nouveau_fifo_number(struct drm_device *);
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extern int nouveau_fifo_ctx_size(struct drm_device *);
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extern void nouveau_fifo_cleanup(struct drm_device *, struct drm_file *);
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extern int nouveau_fifo_owner(struct drm_device *, struct drm_file *,
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int channel);
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extern int nouveau_fifo_alloc(struct drm_device *dev,
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struct nouveau_channel **chan,
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struct drm_file *file_priv,
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struct mem_block *pushbuf,
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uint32_t fb_ctxdma, uint32_t tt_ctxdma);
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extern void nouveau_fifo_free(struct nouveau_channel *);
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/* nouveau_object.c */
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extern int nouveau_gpuobj_early_init(struct drm_device *);
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extern int nouveau_gpuobj_init(struct drm_device *);
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extern void nouveau_gpuobj_takedown(struct drm_device *);
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extern void nouveau_gpuobj_late_takedown(struct drm_device *);
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extern int nouveau_gpuobj_channel_init(struct nouveau_channel *,
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uint32_t vram_h, uint32_t tt_h);
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extern void nouveau_gpuobj_channel_takedown(struct nouveau_channel *);
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extern int nouveau_gpuobj_new(struct drm_device *, struct nouveau_channel *,
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int size, int align, uint32_t flags,
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struct nouveau_gpuobj **);
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extern int nouveau_gpuobj_del(struct drm_device *, struct nouveau_gpuobj **);
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extern int nouveau_gpuobj_ref_add(struct drm_device *, struct nouveau_channel *,
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uint32_t handle, struct nouveau_gpuobj *,
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struct nouveau_gpuobj_ref **);
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extern int nouveau_gpuobj_ref_del(struct drm_device *,
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struct nouveau_gpuobj_ref **);
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extern int nouveau_gpuobj_ref_find(struct nouveau_channel *, uint32_t handle,
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struct nouveau_gpuobj_ref **ref_ret);
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extern int nouveau_gpuobj_new_ref(struct drm_device *,
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struct nouveau_channel *alloc_chan,
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struct nouveau_channel *ref_chan,
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uint32_t handle, int size, int align,
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uint32_t flags, struct nouveau_gpuobj_ref **);
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extern int nouveau_gpuobj_new_fake(struct drm_device *,
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uint32_t p_offset, uint32_t b_offset,
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uint32_t size, uint32_t flags,
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struct nouveau_gpuobj **,
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struct nouveau_gpuobj_ref**);
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extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,
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uint64_t offset, uint64_t size, int access,
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int target, struct nouveau_gpuobj **);
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extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
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uint64_t offset, uint64_t size,
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int access, struct nouveau_gpuobj **,
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uint32_t *o_ret);
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extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
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struct nouveau_gpuobj **);
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extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
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struct drm_file *);
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extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
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struct drm_file *);
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/* nouveau_irq.c */
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extern irqreturn_t nouveau_irq_handler(DRM_IRQ_ARGS);
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extern void nouveau_irq_preinstall(struct drm_device *);
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extern void nouveau_irq_postinstall(struct drm_device *);
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extern void nouveau_irq_uninstall(struct drm_device *);
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/* nouveau_sgdma.c */
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extern int nouveau_sgdma_init(struct drm_device *);
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extern void nouveau_sgdma_takedown(struct drm_device *);
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extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset,
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uint32_t *page);
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extern struct drm_ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
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extern int nouveau_sgdma_nottm_hack_init(struct drm_device *);
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extern void nouveau_sgdma_nottm_hack_takedown(struct drm_device *);
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/* nouveau_dma.c */
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extern int nouveau_dma_channel_init(struct drm_device *);
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extern void nouveau_dma_channel_takedown(struct drm_device *);
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extern int nouveau_dma_wait(struct drm_device *, int size);
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/* nv04_fb.c */
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extern int nv04_fb_init(struct drm_device *);
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extern void nv04_fb_takedown(struct drm_device *);
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/* nv10_fb.c */
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extern int nv10_fb_init(struct drm_device *);
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extern void nv10_fb_takedown(struct drm_device *);
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/* nv40_fb.c */
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extern int nv40_fb_init(struct drm_device *);
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extern void nv40_fb_takedown(struct drm_device *);
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/* nv04_fifo.c */
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extern int nv04_fifo_create_context(struct nouveau_channel *);
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extern void nv04_fifo_destroy_context(struct nouveau_channel *);
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extern int nv04_fifo_load_context(struct nouveau_channel *);
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extern int nv04_fifo_save_context(struct nouveau_channel *);
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/* nv10_fifo.c */
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extern int nv10_fifo_create_context(struct nouveau_channel *);
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extern void nv10_fifo_destroy_context(struct nouveau_channel *);
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extern int nv10_fifo_load_context(struct nouveau_channel *);
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extern int nv10_fifo_save_context(struct nouveau_channel *);
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/* nv40_fifo.c */
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extern int nv40_fifo_init(struct drm_device *);
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extern int nv40_fifo_create_context(struct nouveau_channel *);
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extern void nv40_fifo_destroy_context(struct nouveau_channel *);
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extern int nv40_fifo_load_context(struct nouveau_channel *);
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extern int nv40_fifo_save_context(struct nouveau_channel *);
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/* nv50_fifo.c */
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extern int nv50_fifo_init(struct drm_device *);
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extern void nv50_fifo_takedown(struct drm_device *);
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extern int nv50_fifo_create_context(struct nouveau_channel *);
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extern void nv50_fifo_destroy_context(struct nouveau_channel *);
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extern int nv50_fifo_load_context(struct nouveau_channel *);
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extern int nv50_fifo_save_context(struct nouveau_channel *);
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/* nv04_graph.c */
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extern void nouveau_nv04_context_switch(struct drm_device *);
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extern int nv04_graph_init(struct drm_device *);
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extern void nv04_graph_takedown(struct drm_device *);
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extern int nv04_graph_create_context(struct nouveau_channel *);
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extern void nv04_graph_destroy_context(struct nouveau_channel *);
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extern int nv04_graph_load_context(struct nouveau_channel *);
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extern int nv04_graph_save_context(struct nouveau_channel *);
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/* nv10_graph.c */
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extern void nouveau_nv10_context_switch(struct drm_device *);
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extern int nv10_graph_init(struct drm_device *);
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extern void nv10_graph_takedown(struct drm_device *);
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extern int nv10_graph_create_context(struct nouveau_channel *);
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extern void nv10_graph_destroy_context(struct nouveau_channel *);
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extern int nv10_graph_load_context(struct nouveau_channel *);
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extern int nv10_graph_save_context(struct nouveau_channel *);
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/* nv20_graph.c */
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extern int nv20_graph_create_context(struct nouveau_channel *);
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extern void nv20_graph_destroy_context(struct nouveau_channel *);
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extern int nv20_graph_load_context(struct nouveau_channel *);
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extern int nv20_graph_save_context(struct nouveau_channel *);
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extern int nv20_graph_init(struct drm_device *);
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extern void nv20_graph_takedown(struct drm_device *);
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extern int nv30_graph_init(struct drm_device *);
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/* nv40_graph.c */
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extern int nv40_graph_init(struct drm_device *);
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extern void nv40_graph_takedown(struct drm_device *);
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extern int nv40_graph_create_context(struct nouveau_channel *);
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extern void nv40_graph_destroy_context(struct nouveau_channel *);
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extern int nv40_graph_load_context(struct nouveau_channel *);
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extern int nv40_graph_save_context(struct nouveau_channel *);
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/* nv50_graph.c */
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extern int nv50_graph_init(struct drm_device *);
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extern void nv50_graph_takedown(struct drm_device *);
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extern int nv50_graph_create_context(struct nouveau_channel *);
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extern void nv50_graph_destroy_context(struct nouveau_channel *);
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extern int nv50_graph_load_context(struct nouveau_channel *);
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extern int nv50_graph_save_context(struct nouveau_channel *);
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/* nv04_instmem.c */
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extern int nv04_instmem_init(struct drm_device *);
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extern void nv04_instmem_takedown(struct drm_device *);
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extern int nv04_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
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uint32_t *size);
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extern void nv04_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
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extern int nv04_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
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extern int nv04_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
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/* nv50_instmem.c */
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extern int nv50_instmem_init(struct drm_device *);
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extern void nv50_instmem_takedown(struct drm_device *);
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extern int nv50_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
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uint32_t *size);
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extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
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extern int nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
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extern int nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
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/* nv04_mc.c */
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extern int nv04_mc_init(struct drm_device *);
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extern void nv04_mc_takedown(struct drm_device *);
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/* nv40_mc.c */
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extern int nv40_mc_init(struct drm_device *);
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extern void nv40_mc_takedown(struct drm_device *);
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/* nv50_mc.c */
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extern int nv50_mc_init(struct drm_device *);
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extern void nv50_mc_takedown(struct drm_device *);
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/* nv04_timer.c */
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extern int nv04_timer_init(struct drm_device *);
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extern uint64_t nv04_timer_read(struct drm_device *);
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extern void nv04_timer_takedown(struct drm_device *);
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|
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extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg);
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/* nouveau_buffer.c */
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extern struct drm_bo_driver nouveau_bo_driver;
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|
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/* nouveau_fence.c */
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extern struct drm_fence_driver nouveau_fence_driver;
|
|
extern void nouveau_fence_handler(struct drm_device *dev, int channel);
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|
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#if defined(__powerpc__)
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#define NV_READ(reg) in_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) )
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#define NV_WRITE(reg,val) out_be32((void __iomem *)(dev_priv->mmio)->handle + (reg) , (val) )
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#else
|
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#define NV_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
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#define NV_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
|
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#endif
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|
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/* PRAMIN access */
|
|
#if defined(__powerpc__)
|
|
#define NV_RI32(o) in_be32((void __iomem *)(dev_priv->ramin)->handle+(o))
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|
#define NV_WI32(o,v) out_be32((void __iomem*)(dev_priv->ramin)->handle+(o), (v))
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#else
|
|
#define NV_RI32(o) DRM_READ32(dev_priv->ramin, (o))
|
|
#define NV_WI32(o,v) DRM_WRITE32(dev_priv->ramin, (o), (v))
|
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#endif
|
|
|
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#define INSTANCE_RD(o,i) NV_RI32((o)->im_pramin->start + ((i)<<2))
|
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#define INSTANCE_WR(o,i,v) NV_WI32((o)->im_pramin->start + ((i)<<2), (v))
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|
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#endif /* __NOUVEAU_DRV_H__ */
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