523 lines
14 KiB
C
523 lines
14 KiB
C
/*
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* Copyright (c) 2007 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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*
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* Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
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* 2004 Sylvain Meyer
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*
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* GPL/BSD dual license
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "drm_sarea.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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#include "intel_bios.h"
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#include "intel_drv.h"
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/**
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* i915_probe_agp - get AGP bootup configuration
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* @pdev: PCI device
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* @aperture_size: returns AGP aperture configured size
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* @preallocated_size: returns size of BIOS preallocated AGP space
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*
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* Since Intel integrated graphics are UMA, the BIOS has to set aside
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* some RAM for the framebuffer at early boot. This code figures out
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* how much was set aside so we can use it for our own purposes.
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*/
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int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
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unsigned long *preallocated_size)
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{
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struct pci_dev *bridge_dev;
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u16 tmp = 0;
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unsigned long overhead;
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bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
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if (!bridge_dev) {
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DRM_ERROR("bridge device not found\n");
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return -1;
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}
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/* Get the fb aperture size and "stolen" memory amount. */
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pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);
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pci_dev_put(bridge_dev);
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*aperture_size = 1024 * 1024;
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*preallocated_size = 1024 * 1024;
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_82830_CGC:
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case PCI_DEVICE_ID_INTEL_82845G_IG:
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case PCI_DEVICE_ID_INTEL_82855GM_IG:
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case PCI_DEVICE_ID_INTEL_82865_IG:
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if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
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*aperture_size *= 64;
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else
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*aperture_size *= 128;
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break;
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default:
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/* 9xx supports large sizes, just look at the length */
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*aperture_size = pci_resource_len(pdev, 2);
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break;
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}
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/*
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* Some of the preallocated space is taken by the GTT
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* and popup. GTT is 1K per MB of aperture size, and popup is 4K.
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*/
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overhead = (*aperture_size / 1024) + 4096;
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switch (tmp & INTEL_855_GMCH_GMS_MASK) {
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case INTEL_855_GMCH_GMS_STOLEN_1M:
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break; /* 1M already */
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case INTEL_855_GMCH_GMS_STOLEN_4M:
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*preallocated_size *= 4;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_8M:
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*preallocated_size *= 8;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_16M:
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*preallocated_size *= 16;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_32M:
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*preallocated_size *= 32;
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break;
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case INTEL_915G_GMCH_GMS_STOLEN_48M:
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*preallocated_size *= 48;
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break;
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case INTEL_915G_GMCH_GMS_STOLEN_64M:
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*preallocated_size *= 64;
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break;
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case INTEL_855_GMCH_GMS_DISABLED:
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DRM_ERROR("video memory is disabled\n");
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return -1;
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default:
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DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
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tmp & INTEL_855_GMCH_GMS_MASK);
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return -1;
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}
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*preallocated_size -= overhead;
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return 0;
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}
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int i915_load_modeset_init(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned long agp_size, prealloc_size;
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int size, ret = 0;
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i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
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printk("setting up %ld bytes of VRAM space\n", prealloc_size);
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printk("setting up %ld bytes of TT space\n", (agp_size - prealloc_size));
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ret = i915_gem_init_ringbuffer(dev);
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if (ret)
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goto out;
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/* Allow hardware batchbuffers unless told otherwise.
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*/
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dev_priv->allow_batchbuffer = 1;
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dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
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mutex_init(&dev_priv->cmdbuf_mutex);
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/* Program Hardware Status Page */
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if (!IS_G33(dev)) {
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dev_priv->status_page_dmah =
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drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
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if (!dev_priv->status_page_dmah) {
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DRM_ERROR("Can not allocate hardware status page\n");
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ret = -ENOMEM;
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goto destroy_ringbuffer;
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}
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dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
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dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
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} else {
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size = 4 * 1024;
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ret = drm_buffer_object_create(dev, size,
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drm_bo_type_kernel,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_VRAM |
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DRM_BO_FLAG_NO_EVICT,
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DRM_BO_HINT_DONT_FENCE, 0x1, 0,
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&dev_priv->hws_bo);
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if (ret < 0) {
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DRM_ERROR("Unable to allocate or pin hw status page\n");
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ret = -EINVAL;
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goto destroy_ringbuffer;
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}
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dev_priv->status_gfx_addr =
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dev_priv->hws_bo->offset & (0x1ffff << 12);
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dev_priv->hws_map.offset = dev->agp->base +
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dev_priv->hws_bo->offset;
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dev_priv->hws_map.size = size;
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dev_priv->hws_map.type= 0;
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dev_priv->hws_map.flags= 0;
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dev_priv->hws_map.mtrr = 0;
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drm_core_ioremap(&dev_priv->hws_map, dev);
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if (dev_priv->hws_map.handle == NULL) {
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dev_priv->status_gfx_addr = 0;
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DRM_ERROR("can not ioremap virtual addr for"
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"G33 hw status page\n");
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ret = -ENOMEM;
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goto destroy_hws;
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}
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dev_priv->hw_status_page = dev_priv->hws_map.handle;
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memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
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I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
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}
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DRM_DEBUG("Enabled hardware status page\n");
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dev_priv->wq = create_singlethread_workqueue("i915");
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if (dev_priv->wq == 0) {
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DRM_DEBUG("Error\n");
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ret = -EINVAL;
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goto destroy_hws;
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}
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ret = intel_init_bios(dev);
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if (ret) {
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DRM_ERROR("failed to find VBIOS tables\n");
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ret = -ENODEV;
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goto destroy_wq;
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}
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intel_modeset_init(dev);
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drm_helper_initial_config(dev, false);
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dev->devname = kstrdup(DRIVER_NAME, GFP_KERNEL);
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if (!dev->devname) {
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ret = -ENOMEM;
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goto modeset_cleanup;
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}
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ret = drm_irq_install(dev);
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if (ret) {
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kfree(dev->devname);
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goto modeset_cleanup;
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}
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return 0;
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modeset_cleanup:
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intel_modeset_cleanup(dev);
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destroy_wq:
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destroy_workqueue(dev_priv->wq);
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destroy_hws:
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if (!IS_G33(dev)) {
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if (dev_priv->status_page_dmah)
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drm_pci_free(dev, dev_priv->status_page_dmah);
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} else {
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if (dev_priv->hws_map.handle)
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drm_core_ioremapfree(&dev_priv->hws_map, dev);
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if (dev_priv->hws_bo)
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drm_bo_usage_deref_unlocked(&dev_priv->hws_bo);
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}
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I915_WRITE(HWS_PGA, 0x1ffff000);
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destroy_ringbuffer:
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if (dev_priv->ring.virtual_start)
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drm_mem_reg_iounmap(dev, &dev_priv->ring_buffer->mem,
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dev_priv->ring.virtual_start);
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if (dev_priv->ring_buffer)
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drm_bo_usage_deref_unlocked(&dev_priv->ring_buffer);
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out:
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return ret;
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}
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/**
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* i915_driver_load - setup chip and create an initial config
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* @dev: DRM device
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* @flags: startup flags
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*
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* The driver load routine has to do several things:
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* - drive output discovery via intel_modeset_init()
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* - initialize the memory manager
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* - allocate initial config memory
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* - setup the DRM framebuffer with the allocated memory
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*/
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int i915_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct drm_i915_private *dev_priv;
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int ret = 0;
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dev_priv = drm_alloc(sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
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if (dev_priv == NULL)
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return -ENOMEM;
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memset(dev_priv, 0, sizeof(struct drm_i915_private));
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dev->dev_private = (void *)dev_priv;
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dev_priv->dev = dev;
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/* i915 has 4 more counters */
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dev->counters += 4;
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dev->types[6] = _DRM_STAT_IRQ;
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dev->types[7] = _DRM_STAT_PRIMARY;
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dev->types[8] = _DRM_STAT_SECONDARY;
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dev->types[9] = _DRM_STAT_DMA;
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if (IS_MOBILE(dev) || IS_I9XX(dev))
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dev_priv->cursor_needs_physical = true;
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else
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dev_priv->cursor_needs_physical = false;
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if (IS_I965G(dev) || IS_G33(dev))
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dev_priv->cursor_needs_physical = false;
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if (IS_I9XX(dev)) {
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pci_read_config_dword(dev->pdev, 0x5C, &dev_priv->stolen_base);
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DRM_DEBUG("stolen base %p\n", (void*)dev_priv->stolen_base);
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}
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if (IS_I9XX(dev)) {
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dev_priv->mmiobase = drm_get_resource_start(dev, 0);
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dev_priv->mmiolen = drm_get_resource_len(dev, 0);
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dev->mode_config.fb_base =
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drm_get_resource_start(dev, 2) & 0xff000000;
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} else if (drm_get_resource_start(dev, 1)) {
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dev_priv->mmiobase = drm_get_resource_start(dev, 1);
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dev_priv->mmiolen = drm_get_resource_len(dev, 1);
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dev->mode_config.fb_base =
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drm_get_resource_start(dev, 0) & 0xff000000;
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} else {
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DRM_ERROR("Unable to find MMIO registers\n");
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ret = -ENODEV;
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goto free_priv;
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}
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DRM_DEBUG("fb_base: 0x%08lx\n", dev->mode_config.fb_base);
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ret = drm_addmap(dev, dev_priv->mmiobase, dev_priv->mmiolen,
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_DRM_REGISTERS, _DRM_KERNEL|_DRM_READ_ONLY|_DRM_DRIVER,
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&dev_priv->mmio_map);
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if (ret != 0) {
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DRM_ERROR("Cannot add mapping for MMIO registers\n");
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goto free_priv;
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}
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INIT_LIST_HEAD(&dev_priv->mm.active_list);
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INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
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INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
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INIT_LIST_HEAD(&dev_priv->mm.request_list);
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dev_priv->mm.retire_timer.function = i915_gem_retire_timeout;
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dev_priv->mm.retire_timer.data = (unsigned long) dev;
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init_timer_deferrable (&dev_priv->mm.retire_timer);
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INIT_WORK(&dev_priv->mm.retire_task,
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i915_gem_retire_handler);
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INIT_WORK(&dev_priv->user_interrupt_task,
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i915_user_interrupt_handler);
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dev_priv->mm.next_gem_seqno = 1;
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#ifdef __linux__
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#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
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intel_init_chipset_flush_compat(dev);
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#endif
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#endif
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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/*
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* Initialize the memory manager for local and AGP space
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*/
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ret = drm_bo_driver_init(dev);
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if (ret) {
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DRM_ERROR("fail to init memory manager for "
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"local & AGP space\n");
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goto out_rmmap;
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}
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ret = i915_load_modeset_init(dev);
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if (ret < 0) {
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DRM_ERROR("failed to init modeset\n");
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goto driver_fini;
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}
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}
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return 0;
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driver_fini:
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drm_bo_driver_finish(dev);
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out_rmmap:
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drm_rmmap(dev, dev_priv->mmio_map);
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free_priv:
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drm_free(dev_priv, sizeof(struct drm_i915_private), DRM_MEM_DRIVER);
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return ret;
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}
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int i915_driver_unload(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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I915_WRITE(PRB0_CTL, 0);
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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drm_irq_uninstall(dev);
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intel_modeset_cleanup(dev);
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destroy_workqueue(dev_priv->wq);
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}
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#if 0
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if (dev_priv->ring.virtual_start) {
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drm_core_ioremapfree(&dev_priv->ring.map, dev);
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}
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#endif
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if (dev_priv->sarea_kmap.virtual) {
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drm_bo_kunmap(&dev_priv->sarea_kmap);
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dev_priv->sarea_kmap.virtual = NULL;
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dev->sigdata.lock = NULL;
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}
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if (dev_priv->sarea_bo) {
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mutex_lock(&dev->struct_mutex);
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drm_bo_usage_deref_locked(&dev_priv->sarea_bo);
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mutex_unlock(&dev->struct_mutex);
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dev_priv->sarea_bo = NULL;
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}
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if (dev_priv->status_page_dmah) {
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drm_pci_free(dev, dev_priv->status_page_dmah);
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dev_priv->status_page_dmah = NULL;
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dev_priv->hw_status_page = NULL;
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dev_priv->dma_status_page = 0;
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/* Need to rewrite hardware status page */
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I915_WRITE(HWS_PGA, 0x1ffff000);
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}
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if (dev_priv->status_gfx_addr) {
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dev_priv->status_gfx_addr = 0;
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drm_core_ioremapfree(&dev_priv->hws_map, dev);
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drm_bo_usage_deref_unlocked(&dev_priv->hws_bo);
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I915_WRITE(HWS_PGA, 0x1ffff000);
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}
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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drm_mem_reg_iounmap(dev, &dev_priv->ring_buffer->mem,
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dev_priv->ring.virtual_start);
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DRM_DEBUG("usage is %d\n", atomic_read(&dev_priv->ring_buffer->usage));
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mutex_lock(&dev->struct_mutex);
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drm_bo_usage_deref_locked(&dev_priv->ring_buffer);
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if (drm_bo_clean_mm(dev, DRM_BO_MEM_TT, 1)) {
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DRM_ERROR("Memory manager type 3 not clean. "
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"Delaying takedown\n");
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}
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if (drm_bo_clean_mm(dev, DRM_BO_MEM_VRAM, 1)) {
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DRM_ERROR("Memory manager type 3 not clean. "
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"Delaying takedown\n");
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}
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mutex_unlock(&dev->struct_mutex);
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}
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drm_bo_driver_finish(dev);
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#ifdef __linux__
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#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
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intel_init_chipset_flush_compat(dev);
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#endif
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#endif
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DRM_DEBUG("%p\n", dev_priv->mmio_map);
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drm_rmmap(dev, dev_priv->mmio_map);
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drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
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dev->dev_private = NULL;
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return 0;
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}
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int i915_master_create(struct drm_device *dev, struct drm_master *master)
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{
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struct drm_i915_master_private *master_priv;
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unsigned long sareapage;
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int ret;
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master_priv = drm_calloc(1, sizeof(*master_priv), DRM_MEM_DRIVER);
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if (!master_priv)
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return -ENOMEM;
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/* prebuild the SAREA */
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sareapage = max(SAREA_MAX, PAGE_SIZE);
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ret = drm_addmap(dev, 0, sareapage, _DRM_SHM, _DRM_CONTAINS_LOCK|_DRM_DRIVER,
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&master_priv->sarea);
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if (ret) {
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DRM_ERROR("SAREA setup failed\n");
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return ret;
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}
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master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
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master_priv->sarea_priv->pf_current_page = 0;
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master->driver_priv = master_priv;
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return 0;
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}
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void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
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{
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struct drm_i915_master_private *master_priv = master->driver_priv;
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if (!master_priv)
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return;
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if (master_priv->sarea)
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drm_rmmap(dev, master_priv->sarea);
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drm_free(master_priv, sizeof(*master_priv), DRM_MEM_DRIVER);
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master->driver_priv = NULL;
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}
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void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!drm_core_check_feature(dev, DRIVER_MODESET))
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i915_mem_release(dev, file_priv, dev_priv->agp_heap);
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}
|
|
|
|
void i915_driver_lastclose(struct drm_device * dev)
|
|
{
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
return;
|
|
|
|
#ifdef I915_HAVE_BUFFER
|
|
if (dev_priv->val_bufs) {
|
|
vfree(dev_priv->val_bufs);
|
|
dev_priv->val_bufs = NULL;
|
|
}
|
|
#endif
|
|
|
|
i915_gem_lastclose(dev);
|
|
|
|
if (dev_priv->agp_heap)
|
|
i915_mem_takedown(&(dev_priv->agp_heap));
|
|
|
|
#if defined(I915_HAVE_BUFFER)
|
|
if (dev_priv->sarea_kmap.virtual) {
|
|
drm_bo_kunmap(&dev_priv->sarea_kmap);
|
|
dev_priv->sarea_kmap.virtual = NULL;
|
|
dev->control->master->lock.hw_lock = NULL;
|
|
dev->sigdata.lock = NULL;
|
|
}
|
|
|
|
if (dev_priv->sarea_bo) {
|
|
mutex_lock(&dev->struct_mutex);
|
|
drm_bo_usage_deref_locked(&dev_priv->sarea_bo);
|
|
mutex_unlock(&dev->struct_mutex);
|
|
dev_priv->sarea_bo = NULL;
|
|
}
|
|
#endif
|
|
|
|
i915_dma_cleanup(dev);
|
|
}
|
|
|
|
int i915_driver_firstopen(struct drm_device *dev)
|
|
{
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
return 0;
|
|
|
|
drm_bo_driver_init(dev);
|
|
return 0;
|
|
}
|