130 lines
3.6 KiB
C
130 lines
3.6 KiB
C
/*
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* Copyright 2007 Dave Airlie.
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* Copyright 2007 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Dave Airlie
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* Jerome Glisse <glisse@freedesktop.org>
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*/
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#include "radeon_ms.h"
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static void radeon_ms_fence_flush(struct drm_device *dev)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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struct drm_fence_class_manager *fc = &dev->fm.fence_class[0];
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uint32_t pending_flush_types = 0;
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uint32_t sequence;
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if (dev_priv == NULL) {
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return;
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}
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pending_flush_types = fc->pending_flush |
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((fc->pending_exe_flush) ?
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DRM_FENCE_TYPE_EXE : 0);
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if (pending_flush_types) {
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sequence = mmio_read(dev_priv, dev_priv->fence_reg);
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drm_fence_handler(dev, 0, sequence, pending_flush_types, 0);
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}
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}
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int radeon_ms_fence_emit_sequence(struct drm_device *dev, uint32_t class,
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uint32_t flags, uint32_t *sequence,
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uint32_t *native_type)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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uint32_t fence_id, cmd[2], i, ret;
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if (!dev_priv || dev_priv->cp_ready != 1) {
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return -EINVAL;
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}
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fence_id = (++dev_priv->fence_id_last);
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if (dev_priv->fence_id_last > 0x7FFFFFFF) {
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fence_id = dev_priv->fence_id_last = 1;
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}
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*sequence = fence_id;
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*native_type = DRM_FENCE_TYPE_EXE;
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if (flags & DRM_RADEON_FENCE_FLAG_FLUSHED) {
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*native_type |= DRM_RADEON_FENCE_TYPE_RW;
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dev_priv->flush_cache(dev);
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}
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cmd[0] = CP_PACKET0(dev_priv->fence_reg, 0);
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cmd[1] = fence_id;
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for (i = 0; i < dev_priv->usec_timeout; i++) {
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ret = radeon_ms_ring_emit(dev, cmd, 2);
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if (!ret) {
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dev_priv->irq_emit(dev);
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return 0;
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}
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}
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return -EBUSY;
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}
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void radeon_ms_fence_handler(struct drm_device * dev)
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{
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struct drm_radeon_private *dev_priv = dev->dev_private;
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struct drm_fence_manager *fm = &dev->fm;
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if (dev_priv == NULL) {
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return;
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}
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write_lock(&fm->lock);
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radeon_ms_fence_flush(dev);
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write_unlock(&fm->lock);
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}
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int radeon_ms_fence_has_irq(struct drm_device *dev, uint32_t class,
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uint32_t flags)
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{
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/*
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* We have an irq that tells us when we have a new breadcrumb.
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*/
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if (class == 0 && flags == DRM_FENCE_TYPE_EXE)
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return 1;
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return 0;
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}
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int radeon_ms_fence_types(struct drm_buffer_object *bo,
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uint32_t *class, uint32_t *type)
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{
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*class = 0;
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if (bo->mem.flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
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*type = 3;
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else
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*type = 1;
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return 0;
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}
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void radeon_ms_poke_flush(struct drm_device *dev, uint32_t class)
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{
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struct drm_fence_manager *fm = &dev->fm;
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unsigned long flags;
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if (class != 0)
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return;
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write_lock_irqsave(&fm->lock, flags);
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radeon_ms_fence_flush(dev);
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write_unlock_irqrestore(&fm->lock, flags);
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}
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