2003-05-26 18:37:33 -06:00
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/**
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* \file drm_os_linux.h
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* OS abstraction macros.
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*/
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2002-07-05 02:31:11 -06:00
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/delay.h>
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2003-05-26 18:37:33 -06:00
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/** Current process ID */
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2002-07-05 02:31:11 -06:00
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#define DRM_CURRENTPID current->pid
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2005-08-15 12:07:12 -06:00
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#define DRM_SUSER(p) capable(CAP_SYS_ADMIN)
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2002-07-05 02:31:11 -06:00
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#define DRM_UDELAY(d) udelay(d)
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2004-09-30 15:12:10 -06:00
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#if LINUX_VERSION_CODE <= 0x020608 /* KERNEL_VERSION(2,6,8) */
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2006-02-17 19:53:36 -07:00
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#ifndef __iomem
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#define __iomem
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#endif
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2003-05-26 18:37:33 -06:00
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/** Read a byte from a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset))
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2004-06-10 06:48:35 -06:00
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/** Read a word from a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset))
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2003-05-26 18:37:33 -06:00
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/** Read a dword from a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
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2003-05-26 18:37:33 -06:00
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/** Write a byte into a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))
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2004-06-10 06:48:35 -06:00
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/** Write a word into a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))
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2003-05-26 18:37:33 -06:00
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/** Write a dword into a MMIO region */
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2006-02-17 19:53:36 -07:00
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#define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
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2004-09-11 21:23:50 -06:00
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#else
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/** Read a byte from a MMIO region */
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#define DRM_READ8(map, offset) readb((map)->handle + (offset))
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/** Read a word from a MMIO region */
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#define DRM_READ16(map, offset) readw((map)->handle + (offset))
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/** Read a dword from a MMIO region */
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#define DRM_READ32(map, offset) readl((map)->handle + (offset))
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/** Write a byte into a MMIO region */
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#define DRM_WRITE8(map, offset, val) writeb(val, (map)->handle + (offset))
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/** Write a word into a MMIO region */
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#define DRM_WRITE16(map, offset, val) writew(val, (map)->handle + (offset))
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/** Write a dword into a MMIO region */
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#define DRM_WRITE32(map, offset, val) writel(val, (map)->handle + (offset))
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#endif
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2003-05-26 18:37:33 -06:00
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/** Read memory barrier */
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2003-05-27 19:44:49 -06:00
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#define DRM_READMEMORYBARRIER() rmb()
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2003-05-26 18:37:33 -06:00
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/** Write memory barrier */
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2003-05-27 19:44:49 -06:00
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#define DRM_WRITEMEMORYBARRIER() wmb()
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2003-05-26 18:37:33 -06:00
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/** Read/write memory barrier */
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2003-05-27 19:44:49 -06:00
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#define DRM_MEMORYBARRIER() mb()
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2003-07-29 04:11:48 -06:00
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2003-07-25 04:50:39 -06:00
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/** IRQ handler arguments and return type and values */
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2006-12-19 00:03:20 -07:00
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#define DRM_IRQ_ARGS int irq, void *arg
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2003-07-29 04:11:48 -06:00
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/** backwards compatibility with old irq return values */
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#ifndef IRQ_HANDLED
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typedef void irqreturn_t;
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2004-09-30 15:12:10 -06:00
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#define IRQ_HANDLED /* nothing */
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#define IRQ_NONE /* nothing */
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2003-07-25 04:50:39 -06:00
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#endif
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/** AGP types */
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2004-09-04 17:21:40 -06:00
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#if __OS_HAS_AGP
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2003-07-25 04:50:39 -06:00
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#define DRM_AGP_MEM struct agp_memory
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#define DRM_AGP_KERN struct agp_kern_info
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2004-09-04 17:21:40 -06:00
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#else
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/* define some dummy types for non AGP supporting kernels */
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struct no_agp_kern {
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unsigned long aper_base;
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unsigned long aper_size;
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};
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#define DRM_AGP_MEM int
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#define DRM_AGP_KERN struct no_agp_kern
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#endif
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#if !(__OS_HAS_MTRR)
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2004-09-30 15:12:10 -06:00
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static __inline__ int mtrr_add(unsigned long base, unsigned long size,
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unsigned int type, char increment)
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2004-09-04 17:21:40 -06:00
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{
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return -ENODEV;
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}
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2004-09-30 15:12:10 -06:00
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static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size)
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2004-09-04 17:21:40 -06:00
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{
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return -ENODEV;
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}
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2004-09-30 15:12:10 -06:00
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2004-09-04 17:21:40 -06:00
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#define MTRR_TYPE_WRCOMB 1
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#endif
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2003-07-25 04:50:39 -06:00
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2003-05-26 18:37:33 -06:00
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/** Other copying of data to kernel space */
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2002-07-05 02:31:11 -06:00
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#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
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copy_from_user(arg1, arg2, arg3)
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2003-05-26 18:37:33 -06:00
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/** Other copying of data from kernel space */
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2002-07-05 02:31:11 -06:00
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#define DRM_COPY_TO_USER(arg1, arg2, arg3) \
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copy_to_user(arg1, arg2, arg3)
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/* Macros for copyfrom user, but checking readability only once */
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#define DRM_VERIFYAREA_READ( uaddr, size ) \
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2005-03-25 02:47:36 -07:00
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(access_ok( VERIFY_READ, uaddr, size) ? 0 : -EFAULT)
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2002-07-05 02:31:11 -06:00
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#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \
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__copy_from_user(arg1, arg2, arg3)
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2003-11-03 17:46:05 -07:00
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#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \
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__copy_to_user(arg1, arg2, arg3)
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2002-07-05 02:31:11 -06:00
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#define DRM_GET_USER_UNCHECKED(val, uaddr) \
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__get_user(val, uaddr)
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2002-09-29 15:19:01 -06:00
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#define DRM_HZ HZ
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2003-04-07 19:30:43 -06:00
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#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
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do { \
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2005-04-18 18:31:16 -06:00
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DECLARE_WAITQUEUE(entry, current); \
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unsigned long end = jiffies + (timeout); \
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add_wait_queue(&(queue), &entry); \
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\
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for (;;) { \
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__set_current_state(TASK_INTERRUPTIBLE); \
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if (condition) \
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break; \
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if (time_after_eq(jiffies, end)) { \
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ret = -EBUSY; \
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break; \
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} \
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schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \
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if (signal_pending(current)) { \
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ret = -EINTR; \
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break; \
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} \
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} \
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__set_current_state(TASK_RUNNING); \
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remove_wait_queue(&(queue), &entry); \
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2002-09-29 15:19:01 -06:00
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} while (0)
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#define DRM_WAKEUP( queue ) wake_up_interruptible( queue )
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#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
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