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nv50: primitive i2c interrupt handler

main
Maarten Maathuis 2008-04-05 21:02:00 +02:00
parent 3fc444a5e8
commit 1692d30cea
2 changed files with 23 additions and 1 deletions
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21
shared-core/nouveau_irq.c
View File

@ -450,8 +450,22 @@ static void
nouveau_nv50_display_irq_handler(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
uint32_t val = NV_READ(NV50_DISPLAY_SUPERVISOR);
NV_WRITE(NV50_DISPLAY_SUPERVISOR, NV_READ(NV50_DISPLAY_SUPERVISOR));
DRM_INFO("NV50_DISPLAY_INTR - 0x%08X\n", val);
NV_WRITE(NV50_DISPLAY_SUPERVISOR, val);
}
static void
nouveau_nv50_i2c_irq_handler(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
DRM_INFO("NV50_I2C_INTR - 0x%08X\n", NV_READ(NV50_I2C_CONTROLLER));
/* This seems to be the way to acknowledge an interrupt. */
NV_WRITE(NV50_I2C_CONTROLLER, 0x7FFF7FFF);
}
irqreturn_t
@ -485,6 +499,11 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
status &= ~NV_PMC_INTR_0_NV50_DISPLAY_PENDING;
}
if (status & NV_PMC_INTR_0_NV50_I2C_PENDING) {
nouveau_nv50_i2c_irq_handler(dev);
status &= ~NV_PMC_INTR_0_NV50_I2C_PENDING;
}
if (status)
DRM_ERROR("Unhandled PMC INTR status bits 0x%08x\n", status);

3
shared-core/nouveau_reg.h
View File

@ -85,6 +85,7 @@
#define NV03_PMC_INTR_0 0x00000100
# define NV_PMC_INTR_0_PFIFO_PENDING (1<< 8)
# define NV_PMC_INTR_0_PGRAPH_PENDING (1<<12)
# define NV_PMC_INTR_0_NV50_I2C_PENDING (1<<21)
# define NV_PMC_INTR_0_CRTC0_PENDING (1<<24)
# define NV_PMC_INTR_0_CRTC1_PENDING (1<<25)
# define NV_PMC_INTR_0_NV50_DISPLAY_PENDING (1<<26)
@ -124,6 +125,8 @@
#define NV04_PTIMER_TIME_1 0x00009410
#define NV04_PTIMER_ALARM_0 0x00009420
#define NV50_I2C_CONTROLLER 0x0000E054
#define NV04_PFB_CFG0 0x00100200
#define NV04_PFB_CFG1 0x00100204
#define NV40_PFB_020C 0x0010020C