Import -f XFree86 4.0.99.2
parent
0e7f6c0726
commit
1759c16ab9
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@ -1,5 +1,5 @@
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# $FreeBSD$
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SUBDIR = drm tdfx gamma
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SUBDIR = drm tdfx mga gamma
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.include <bsd.subdir.mk>
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@ -3,7 +3,7 @@
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KMOD = tdfx
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SRCS = tdfx_drv.c tdfx_context.c
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SRCS += device_if.h bus_if.h pci_if.h
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CFLAGS += ${DEBUG_FLAGS} -I..
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CFLAGS += ${DEBUG_FLAGS} -I. -I..
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KMODDEPS = drm
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@:
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@ -1,5 +1,5 @@
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# $FreeBSD$
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SUBDIR = drm tdfx gamma
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SUBDIR = drm tdfx mga gamma
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.include <bsd.subdir.mk>
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@ -1,5 +1,5 @@
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# $FreeBSD$
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SUBDIR = drm tdfx gamma
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SUBDIR = drm tdfx mga gamma
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.include <bsd.subdir.mk>
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@ -135,12 +135,12 @@ int drm_getmagic(dev_t kdev, u_long cmd, caddr_t data,
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if (priv->magic) {
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auth.magic = priv->magic;
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} else {
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simple_lock(&lock);
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do {
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simple_lock(&lock);
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if (!sequence) ++sequence; /* reserve 0 */
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auth.magic = sequence++;
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} while (drm_find_file(dev, auth.magic));
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simple_unlock(&lock);
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} while (drm_find_file(dev, auth.magic));
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priv->magic = auth.magic;
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drm_add_magic(dev, priv, auth.magic);
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}
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@ -121,6 +121,7 @@ int drm_freelist_create(drm_freelist_t *bl, int count)
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bl->low_mark = 0;
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bl->high_mark = 0;
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atomic_set(&bl->wfh, 0);
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/* bl->lock = SPIN_LOCK_UNLOCKED; */
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++bl->initialized;
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return 0;
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}
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@ -159,6 +160,7 @@ int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
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drm_histogram_compute(dev, buf);
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#endif
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buf->list = DRM_LIST_FREE;
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/*
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do {
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old = (unsigned long)bl->next;
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buf->next = (void *)old;
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@ -169,6 +171,13 @@ int drm_freelist_put(drm_device_t *dev, drm_freelist_t *bl, drm_buf_t *buf)
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return 1;
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}
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} while (failed);
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*/
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simple_lock(&bl->lock);
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buf->next = bl->next;
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bl->next = buf;
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simple_unlock(&bl->lock);
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atomic_inc(&bl->count);
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if (atomic_read(&bl->count) > dma->buf_count) {
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DRM_ERROR("%d of %d buffers free after addition of %d\n",
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@ -195,6 +204,7 @@ static drm_buf_t *drm_freelist_try(drm_freelist_t *bl)
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if (!bl) return NULL;
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/* Get buffer */
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/*
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do {
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old = (unsigned int)bl->next;
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if (!old) {
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@ -210,6 +220,16 @@ static drm_buf_t *drm_freelist_try(drm_freelist_t *bl)
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atomic_dec(&bl->count);
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buf = (drm_buf_t *)old;
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*/
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simple_lock(&bl->lock);
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if(!bl->next){
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simple_unlock(&bl->lock);
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return NULL;
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}
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buf = bl->next;
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bl->next = bl->next->next;
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simple_unlock(&bl->lock);
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atomic_dec(&bl->count);
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buf->next = NULL;
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buf->list = DRM_LIST_NONE;
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DRM_DEBUG("%d, count = %d, wfh = %d, w%d, p%d\n",
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@ -135,9 +135,12 @@ static int drm_flush_queue(drm_device_t *dev, int context)
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if (atomic_read(&q->use_count) > 1) {
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atomic_inc(&q->block_write);
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atomic_inc(&q->block_count);
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error = tsleep(&q->flush_queue, PCATCH|PZERO, "drmfq", 0);
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if (error)
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return error;
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for (;;) {
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if (!DRM_BUFCOUNT(&q->waitlist)) break;
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error = tsleep(&q->flush_queue, PCATCH|PZERO, "drmfq", 0);
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if (error)
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return error;
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}
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atomic_dec(&q->block_count);
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}
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atomic_dec(&q->use_count);
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@ -95,7 +95,7 @@ void drm_mem_init(void)
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/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
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static int _drm_mem_info SYSCTL_HANDLER_ARGS
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static int _drm_mem_info DRM_SYSCTL_HANDLER_ARGS
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{
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drm_mem_stats_t *pt;
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char buf[128];
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@ -127,7 +127,7 @@ static int _drm_mem_info SYSCTL_HANDLER_ARGS
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return 0;
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}
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int drm_mem_info SYSCTL_HANDLER_ARGS
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int drm_mem_info DRM_SYSCTL_HANDLER_ARGS
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{
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int ret;
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@ -3,7 +3,7 @@
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KMOD = gamma
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SRCS = gamma_drv.c gamma_dma.c
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SRCS += device_if.h bus_if.h pci_if.h
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CFLAGS += ${DEBUG_FLAGS} -I..
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CFLAGS += ${DEBUG_FLAGS} -I. -I..
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KMODDEPS = drm
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@:
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@ -188,7 +188,11 @@ int mga_rmctx(dev_t kdev, u_long cmd, caddr_t data, int flags, struct proc *p)
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ctx = *(drm_ctx_t *) data;
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DRM_DEBUG("%d\n", ctx.handle);
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if(ctx.handle != DRM_KERNEL_CONTEXT) {
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/*
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if(ctx.handle == DRM_KERNEL_CONTEXT+1)
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priv->remove_auth_on_close = 1;
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*/
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if(ctx.handle != DRM_KERNEL_CONTEXT ) {
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drm_ctxbitmap_free(dev, ctx.handle);
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}
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@ -130,7 +130,6 @@ static int mga_freelist_init(drm_device_t *dev)
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item->buf = buf;
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buf_priv->my_freelist = item;
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buf_priv->discard = 0;
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buf_priv->dispatched = 0;
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dev_priv->head->next = item;
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}
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@ -176,7 +175,7 @@ static __inline void mga_dma_quiescent(drm_device_t *dev)
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atomic_read(&dev->total_irq),
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atomic_read(&dma->total_lost));
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DRM_ERROR("lockup\n");
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goto out_nolock;
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return;
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}
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for (i = 0 ; i < 2000 ; i++) mga_delay();
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}
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atomic_read(&dev->total_irq),
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atomic_read(&dma->total_lost));
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DRM_ERROR("lockup\n");
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goto out_status;
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clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
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return;
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}
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for (i = 0 ; i < 2000 ; i++) mga_delay();
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}
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sarea_priv->dirty |= MGA_DMA_FLUSH;
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out_status:
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clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
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out_nolock:
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DRM_DEBUG("exit, dispatch_status = 0x%02x\n",dev_priv->dispatch_status);
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}
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static void mga_reset_freelist(drm_device_t *dev)
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set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
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for (;;) {
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mga_dma_schedule(dev, 0);
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if(!test_bit(MGA_IN_GETBUF,
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&dev_priv->dispatch_status))
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/* if(!test_bit(MGA_IN_GETBUF,
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&dev_priv->dispatch_status)) */
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if(dev_priv->tail->age < dev_priv->last_prim_age)
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break;
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atomic_inc(&dev->total_sleeps);
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ret = tsleep(&dev_priv->buf_queue, PZERO|PCATCH,
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"mgafg", 0);
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if (ret) {
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if (ret == EINTR) {
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clear_bit(MGA_IN_GETBUF,
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&dev_priv->dispatch_status);
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splx(s);
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goto failed_getbuf;
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break;
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}
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}
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splx(s);
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clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
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if (ret) return NULL;
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}
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if(dev_priv->tail->age < dev_priv->last_prim_age) {
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@ -263,7 +264,6 @@ drm_buf_t *mga_freelist_get(drm_device_t *dev)
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return next->buf;
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}
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failed_getbuf:
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failed++;
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return NULL;
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}
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@ -520,61 +520,55 @@ int mga_advance_primary(drm_device_t *dev)
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static __inline int mga_decide_to_fire(drm_device_t *dev)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
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drm_device_dma_t *dma = dev->dma;
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DRM_DEBUG("%s\n", __FUNCTION__);
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if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) {
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atomic_inc(&dma->total_prio);
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return 1;
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}
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if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
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dev_priv->next_prim->num_dwords) {
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atomic_inc(&dma->total_prio);
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return 1;
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}
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if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
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dev_priv->next_prim->num_dwords) {
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atomic_inc(&dma->total_prio);
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return 1;
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}
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if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) {
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if(test_bit(MGA_BUF_SWAP_PENDING,
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&dev_priv->next_prim->buffer_status)) {
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atomic_inc(&dma->total_dmas);
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return 1;
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}
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}
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if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) {
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if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) {
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atomic_inc(&dma->total_hit);
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return 1;
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}
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}
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if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) {
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if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) {
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atomic_inc(&dma->total_missed_free);
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return 1;
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}
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}
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atomic_inc(&dma->total_tried);
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return 0;
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}
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int mga_dma_schedule(drm_device_t *dev, int locked)
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{
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drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
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drm_device_dma_t *dma = dev->dma;
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int retval =0 ;
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if (!dev_priv) return EBUSY;
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if (test_and_set_bit(0, &dev->dma_flag)) {
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atomic_inc(&dma->total_missed_dma);
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return EBUSY;
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retval = EBUSY;
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goto sch_out_wakeup;
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}
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DRM_DEBUG("%s\n", __FUNCTION__);
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@ -591,17 +585,15 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
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if (!locked &&
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!drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
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atomic_inc(&dma->total_missed_lock);
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clear_bit(0, &dev->dma_flag);
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DRM_DEBUG("Not locked\n");
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return EBUSY;
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retval = EBUSY;
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goto sch_out_wakeup;
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}
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DRM_DEBUG("I'm locked\n");
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if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) {
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/* Fire dma buffer */
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if(mga_decide_to_fire(dev)) {
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DRM_DEBUG("idx :%d\n", dev_priv->next_prim->idx);
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clear_bit(MGA_BUF_FORCE_FIRE,
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&dev_priv->next_prim->buffer_status);
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if(dev_priv->current_prim == dev_priv->next_prim) {
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@ -613,8 +605,6 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
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} else {
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clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
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}
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} else {
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DRM_DEBUG("I can't get the dispatch lock\n");
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}
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if (!locked) {
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@ -623,9 +613,9 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
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DRM_ERROR("\n");
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}
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}
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clear_bit(0, &dev->dma_flag);
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sch_out_wakeup:
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if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) &&
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dev_priv->next_prim->num_dwords == 0 &&
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atomic_read(&dev_priv->pending_bufs) == 0) {
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/* Everything has been processed by the hardware */
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clear_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status);
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@ -633,18 +623,10 @@ int mga_dma_schedule(drm_device_t *dev, int locked)
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}
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if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) &&
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dev_priv->tail->age < dev_priv->last_prim_age) {
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clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status);
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DRM_DEBUG("Waking up buf queue\n");
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dev_priv->tail->age < dev_priv->last_prim_age)
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wakeup(&dev_priv->buf_queue);
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} else if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) {
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DRM_DEBUG("Not waking buf_queue on %d %d\n",
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atomic_read(&dev->total_irq),
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dev_priv->last_prim_age);
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}
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clear_bit(0, &dev->dma_flag);
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return 0;
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return retval;
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}
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static void mga_dma_service(void *arg)
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@ -653,7 +635,6 @@ static void mga_dma_service(void *arg)
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drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
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drm_mga_prim_buf_t *last_prim_buffer;
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DRM_DEBUG("%s\n", __FUNCTION__);
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atomic_inc(&dev->total_irq);
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if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return;
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MGA_WRITE(MGAREG_ICLEAR, 0x00000001);
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@ -663,11 +644,11 @@ static void mga_dma_service(void *arg)
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dev_priv->sarea_priv->last_dispatch =
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dev_priv->last_prim_age = last_prim_buffer->prim_age;
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clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status);
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wakeup(&dev_priv->wait_queue);
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clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status);
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clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
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atomic_dec(&dev_priv->pending_bufs);
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taskqueue_enqueue(taskqueue_swi, &dev->task);
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wakeup(&dev_priv->wait_queue);
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}
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static void mga_dma_task_queue(void *device, int pending)
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@ -684,6 +665,8 @@ int mga_dma_cleanup(drm_device_t *dev)
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drm_mga_private_t *dev_priv =
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(drm_mga_private_t *) dev->dev_private;
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if (dev->irq) mga_flush_queue(dev);
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mga_dma_quiescent(dev);
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if(dev_priv->ioremap) {
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int temp = (dev_priv->warp_ucode_size +
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dev_priv->primary_size +
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@ -723,9 +706,6 @@ int mga_dma_cleanup(drm_device_t *dev)
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static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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drm_mga_private_t *dev_priv;
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drm_map_t *sarea_map = NULL;
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int i;
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DRM_DEBUG("%s\n", __FUNCTION__);
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dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
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if(dev_priv == NULL) return ENOMEM;
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@ -760,8 +740,8 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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dev_priv->mAccess = init->mAccess;
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dev_priv->flush_queue = 0;
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dev_priv->buf_queue = 0;
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dev_priv->WarpPipe = -1;
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dev_priv->WarpPipe = 0xff000000;
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dev_priv->vertexsize = 0;
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DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
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dev_priv->chipset, dev_priv->warp_ucode_size,
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@ -773,13 +753,6 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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memcpy(&dev_priv->WarpIndex, &init->WarpIndex,
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sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES);
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for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++)
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DRM_DEBUG("warp pipe %d: installed: %d phys: %lx size: %x\n",
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i,
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dev_priv->WarpIndex[i].installed,
|
||||
dev_priv->WarpIndex[i].phys_addr,
|
||||
dev_priv->WarpIndex[i].size);
|
||||
|
||||
if(mga_init_primary_bufs(dev, init) != 0) {
|
||||
DRM_ERROR("Can not initialize primary buffers\n");
|
||||
mga_dma_cleanup(dev);
|
||||
|
@ -951,9 +924,7 @@ static int mga_flush_queue(drm_device_t *dev)
|
|||
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
if(dev_priv == NULL) {
|
||||
return 0;
|
||||
}
|
||||
if(!dev_priv) return 0;
|
||||
|
||||
if(dev_priv->next_prim->num_dwords != 0) {
|
||||
s = splsofttq();
|
||||
|
@ -1065,7 +1036,7 @@ int mga_lock(dev_t kdev, u_long cmd, caddr_t data,
|
|||
}
|
||||
}
|
||||
|
||||
DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
if (ret) DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1086,16 +1057,16 @@ int mga_flush_ioctl(dev_t kdev, u_long cmd, caddr_t data,
|
|||
}
|
||||
|
||||
if(lock.flags & _DRM_LOCK_FLUSH || lock.flags & _DRM_LOCK_FLUSH_ALL) {
|
||||
drm_mga_prim_buf_t *temp_buf =
|
||||
dev_priv->prim_bufs[dev_priv->current_prim_idx];
|
||||
drm_mga_prim_buf_t *temp_buf;
|
||||
temp_buf = dev_priv->current_prim;
|
||||
|
||||
if(temp_buf && temp_buf->num_dwords) {
|
||||
s = splsofttq();
|
||||
if(temp_buf && temp_buf->num_dwords) {
|
||||
set_bit(MGA_BUF_FORCE_FIRE, &temp_buf->buffer_status);
|
||||
mga_advance_primary(dev);
|
||||
}
|
||||
mga_dma_schedule(dev, 1);
|
||||
splx(s);
|
||||
}
|
||||
}
|
||||
if(lock.flags & _DRM_LOCK_QUIESCENT) {
|
||||
mga_flush_queue(dev);
|
||||
|
|
|
@ -40,8 +40,8 @@ MODULE_DEPEND(mga, agp, 1, 1, 1);
|
|||
|
||||
#define MGA_NAME "mga"
|
||||
#define MGA_DESC "Matrox g200/g400"
|
||||
#define MGA_DATE "19991213"
|
||||
#define MGA_MAJOR 1
|
||||
#define MGA_DATE "20000928"
|
||||
#define MGA_MAJOR 2
|
||||
#define MGA_MINOR 0
|
||||
#define MGA_PATCHLEVEL 0
|
||||
|
||||
|
|
|
@ -39,8 +39,8 @@
|
|||
|
||||
typedef struct {
|
||||
u_int32_t buffer_status;
|
||||
unsigned int num_dwords;
|
||||
unsigned int max_dwords;
|
||||
int num_dwords;
|
||||
int max_dwords;
|
||||
u_int32_t *current_dma_ptr;
|
||||
u_int32_t *head;
|
||||
u_int32_t phys_head;
|
||||
|
@ -50,7 +50,7 @@ typedef struct {
|
|||
} drm_mga_prim_buf_t;
|
||||
|
||||
typedef struct _drm_mga_freelist {
|
||||
unsigned int age;
|
||||
__volatile__ unsigned int age;
|
||||
drm_buf_t *buf;
|
||||
struct _drm_mga_freelist *next;
|
||||
struct _drm_mga_freelist *prev;
|
||||
|
@ -82,6 +82,7 @@ typedef struct _drm_mga_private {
|
|||
int use_agp;
|
||||
drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES];
|
||||
unsigned int WarpPipe;
|
||||
unsigned int vertexsize;
|
||||
atomic_t pending_bufs;
|
||||
void *status_page;
|
||||
unsigned long real_status_page;
|
||||
|
@ -191,12 +192,20 @@ typedef struct {
|
|||
&tmp_buf->buffer_status)) { \
|
||||
mga_advance_primary(dev); \
|
||||
mga_dma_schedule(dev, 1); \
|
||||
tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
|
||||
} else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length ||\
|
||||
tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
|
||||
set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
|
||||
mga_advance_primary(dev); \
|
||||
mga_dma_schedule(dev, 1); \
|
||||
tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
|
||||
} \
|
||||
if(MGA_VERBOSE) \
|
||||
DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
|
||||
dma_ptr = tmp_buf->current_dma_ptr; \
|
||||
num_dwords = tmp_buf->num_dwords; \
|
||||
phys_head = tmp_buf->phys_head; \
|
||||
outcount = 0; \
|
||||
} while(0)
|
||||
|
||||
#define PRIMGETPTR(dev_priv) do { \
|
||||
|
@ -344,6 +353,73 @@ drm_mga_prim_buf_t *tmp_buf = \
|
|||
#define MGAREG_YTOP 0x1c98
|
||||
#define MGAREG_ZORG 0x1c0c
|
||||
|
||||
/* Warp registers */
|
||||
#define MGAREG_WR0 0x2d00
|
||||
#define MGAREG_WR1 0x2d04
|
||||
#define MGAREG_WR2 0x2d08
|
||||
#define MGAREG_WR3 0x2d0c
|
||||
#define MGAREG_WR4 0x2d10
|
||||
#define MGAREG_WR5 0x2d14
|
||||
#define MGAREG_WR6 0x2d18
|
||||
#define MGAREG_WR7 0x2d1c
|
||||
#define MGAREG_WR8 0x2d20
|
||||
#define MGAREG_WR9 0x2d24
|
||||
#define MGAREG_WR10 0x2d28
|
||||
#define MGAREG_WR11 0x2d2c
|
||||
#define MGAREG_WR12 0x2d30
|
||||
#define MGAREG_WR13 0x2d34
|
||||
#define MGAREG_WR14 0x2d38
|
||||
#define MGAREG_WR15 0x2d3c
|
||||
#define MGAREG_WR16 0x2d40
|
||||
#define MGAREG_WR17 0x2d44
|
||||
#define MGAREG_WR18 0x2d48
|
||||
#define MGAREG_WR19 0x2d4c
|
||||
#define MGAREG_WR20 0x2d50
|
||||
#define MGAREG_WR21 0x2d54
|
||||
#define MGAREG_WR22 0x2d58
|
||||
#define MGAREG_WR23 0x2d5c
|
||||
#define MGAREG_WR24 0x2d60
|
||||
#define MGAREG_WR25 0x2d64
|
||||
#define MGAREG_WR26 0x2d68
|
||||
#define MGAREG_WR27 0x2d6c
|
||||
#define MGAREG_WR28 0x2d70
|
||||
#define MGAREG_WR29 0x2d74
|
||||
#define MGAREG_WR30 0x2d78
|
||||
#define MGAREG_WR31 0x2d7c
|
||||
#define MGAREG_WR32 0x2d80
|
||||
#define MGAREG_WR33 0x2d84
|
||||
#define MGAREG_WR34 0x2d88
|
||||
#define MGAREG_WR35 0x2d8c
|
||||
#define MGAREG_WR36 0x2d90
|
||||
#define MGAREG_WR37 0x2d94
|
||||
#define MGAREG_WR38 0x2d98
|
||||
#define MGAREG_WR39 0x2d9c
|
||||
#define MGAREG_WR40 0x2da0
|
||||
#define MGAREG_WR41 0x2da4
|
||||
#define MGAREG_WR42 0x2da8
|
||||
#define MGAREG_WR43 0x2dac
|
||||
#define MGAREG_WR44 0x2db0
|
||||
#define MGAREG_WR45 0x2db4
|
||||
#define MGAREG_WR46 0x2db8
|
||||
#define MGAREG_WR47 0x2dbc
|
||||
#define MGAREG_WR48 0x2dc0
|
||||
#define MGAREG_WR49 0x2dc4
|
||||
#define MGAREG_WR50 0x2dc8
|
||||
#define MGAREG_WR51 0x2dcc
|
||||
#define MGAREG_WR52 0x2dd0
|
||||
#define MGAREG_WR53 0x2dd4
|
||||
#define MGAREG_WR54 0x2dd8
|
||||
#define MGAREG_WR55 0x2ddc
|
||||
#define MGAREG_WR56 0x2de0
|
||||
#define MGAREG_WR57 0x2de4
|
||||
#define MGAREG_WR58 0x2de8
|
||||
#define MGAREG_WR59 0x2dec
|
||||
#define MGAREG_WR60 0x2df0
|
||||
#define MGAREG_WR61 0x2df4
|
||||
#define MGAREG_WR62 0x2df8
|
||||
#define MGAREG_WR63 0x2dfc
|
||||
|
||||
|
||||
#define PDEA_pagpxfer_enable 0x2
|
||||
|
||||
#define WIA_wmode_suspend 0x0
|
||||
|
|
|
@ -37,6 +37,20 @@
|
|||
typedef u_int16_t u16;
|
||||
typedef u_int32_t u32;
|
||||
|
||||
#define MGAEMITCLIP_SIZE 10
|
||||
#define MGAEMITCTX_SIZE 20
|
||||
#define MGAG200EMITTEX_SIZE 20
|
||||
#define MGAG400EMITTEX0_SIZE 30
|
||||
#define MGAG400EMITTEX1_SIZE 25
|
||||
#define MGAG400EMITPIPE_SIZE 50
|
||||
#define MGAG200EMITPIPE_SIZE 15
|
||||
|
||||
#define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
|
||||
MGAEMITCTX_SIZE + MGAG400EMITTEX0_SIZE + \
|
||||
MGAG400EMITTEX1_SIZE + MGAG400EMITPIPE_SIZE)
|
||||
|
||||
|
||||
|
||||
static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
|
||||
drm_clip_rect_t * box)
|
||||
{
|
||||
|
@ -49,6 +63,7 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
|
|||
PRIMGETPTR(dev_priv);
|
||||
|
||||
/* Force reset of dwgctl (eliminates clip disable) */
|
||||
if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
|
||||
#if 0
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0);
|
||||
|
@ -60,11 +75,11 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
|
|||
PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
|
||||
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000);
|
||||
#endif
|
||||
|
||||
}
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
|
||||
PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / 2);
|
||||
PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / 2);
|
||||
PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
|
||||
PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / dev_priv->cpp);
|
||||
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
@ -76,7 +91,7 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
|
|||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
/* This takes a max of 15 dwords */
|
||||
/* This takes a max of 20 dwords */
|
||||
PRIMGETPTR(dev_priv);
|
||||
|
||||
PRIMOUTREG(MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG]);
|
||||
|
@ -94,6 +109,12 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0]);
|
||||
PRIMOUTREG(MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1]);
|
||||
PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
|
||||
|
||||
PRIMOUTREG(MGAREG_STENCIL, regs[MGA_CTXREG_STENCIL]);
|
||||
PRIMOUTREG(MGAREG_STENCILCTL, regs[MGA_CTXREG_STENCILCTL]);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
||||
} else {
|
||||
PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
@ -128,9 +149,9 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
|
||||
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
|
||||
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
|
||||
PRIMOUTREG(0x2d00 + 24 * 4, regs[MGA_TEXREG_WIDTH]);
|
||||
PRIMOUTREG(MGAREG_WR24, regs[MGA_TEXREG_WIDTH]);
|
||||
|
||||
PRIMOUTREG(0x2d00 + 34 * 4, regs[MGA_TEXREG_HEIGHT]);
|
||||
PRIMOUTREG(MGAREG_WR34, regs[MGA_TEXREG_HEIGHT]);
|
||||
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
|
||||
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
@ -138,11 +159,12 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
|
|||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
#define TMC_dualtex_enable 0x80
|
||||
|
||||
static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int *regs = sarea_priv->TexState[0];
|
||||
int multitex = sarea_priv->WarpPipe & MGA_T2;
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
|
@ -163,22 +185,21 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
|
||||
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
|
||||
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
|
||||
PRIMOUTREG(0x2d00 + 49 * 4, 0);
|
||||
PRIMOUTREG(MGAREG_WR49, 0);
|
||||
|
||||
PRIMOUTREG(0x2d00 + 57 * 4, 0);
|
||||
PRIMOUTREG(0x2d00 + 53 * 4, 0);
|
||||
PRIMOUTREG(0x2d00 + 61 * 4, 0);
|
||||
PRIMOUTREG(MGAREG_WR57, 0);
|
||||
PRIMOUTREG(MGAREG_WR53, 0);
|
||||
PRIMOUTREG(MGAREG_WR61, 0);
|
||||
PRIMOUTREG(MGAREG_WR52, 0x40);
|
||||
|
||||
PRIMOUTREG(MGAREG_WR60, 0x40);
|
||||
PRIMOUTREG(MGAREG_WR54, regs[MGA_TEXREG_WIDTH] | 0x40);
|
||||
PRIMOUTREG(MGAREG_WR62, regs[MGA_TEXREG_HEIGHT] | 0x40);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
||||
if (!multitex) {
|
||||
PRIMOUTREG(0x2d00 + 52 * 4, 0x40);
|
||||
PRIMOUTREG(0x2d00 + 60 * 4, 0x40);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
}
|
||||
|
||||
PRIMOUTREG(0x2d00 + 54 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
|
||||
PRIMOUTREG(0x2d00 + 62 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
|
||||
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
|
||||
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
|
||||
|
||||
|
@ -212,14 +233,15 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4]);
|
||||
PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH]);
|
||||
PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT]);
|
||||
PRIMOUTREG(0x2d00 + 49 * 4, 0);
|
||||
PRIMOUTREG(MGAREG_WR49, 0);
|
||||
|
||||
PRIMOUTREG(0x2d00 + 57 * 4, 0);
|
||||
PRIMOUTREG(0x2d00 + 53 * 4, 0);
|
||||
PRIMOUTREG(0x2d00 + 61 * 4, 0);
|
||||
PRIMOUTREG(0x2d00 + 52 * 4, regs[MGA_TEXREG_WIDTH] | 0x40);
|
||||
PRIMOUTREG(MGAREG_WR57, 0);
|
||||
PRIMOUTREG(MGAREG_WR53, 0);
|
||||
PRIMOUTREG(MGAREG_WR61, 0);
|
||||
PRIMOUTREG(MGAREG_WR52, regs[MGA_TEXREG_WIDTH] | 0x40);
|
||||
|
||||
PRIMOUTREG(MGAREG_WR60, regs[MGA_TEXREG_HEIGHT] | 0x40);
|
||||
|
||||
PRIMOUTREG(0x2d00 + 60 * 4, regs[MGA_TEXREG_HEIGHT] | 0x40);
|
||||
PRIMOUTREG(MGAREG_TEXTRANS, 0xffff);
|
||||
PRIMOUTREG(MGAREG_TEXTRANSHIGH, 0xffff);
|
||||
PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
|
||||
|
@ -227,12 +249,17 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
|
|||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
#define MAGIC_FPARAM_HEX_VALUE 0x46480000
|
||||
/* This is the hex value of 12800.0f which is a magic value we must
|
||||
* set in wr56.
|
||||
*/
|
||||
|
||||
|
||||
#define EMIT_PIPE 50
|
||||
static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
|
||||
{
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int pipe = sarea_priv->WarpPipe;
|
||||
float fParam = 12800.0f;
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
|
@ -266,14 +293,14 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
|
||||
|
||||
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
||||
PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
|
||||
PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
|
||||
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
|
||||
|
||||
PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
|
||||
PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
|
||||
PRIMOUTREG(MGAREG_TEXCTL2, 0x00008000);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
}
|
||||
|
||||
PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
|
||||
|
@ -289,18 +316,20 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
|
|||
|
||||
PRIMOUTREG(MGAREG_WFLAG, 0);
|
||||
PRIMOUTREG(MGAREG_WFLAG1, 0);
|
||||
PRIMOUTREG(0x2d00 + 56 * 4, *((u32 *) (&fParam)));
|
||||
PRIMOUTREG(MGAREG_WR56, MAGIC_FPARAM_HEX_VALUE);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
|
||||
PRIMOUTREG(0x2d00 + 49 * 4, 0); /* Tex stage 0 */
|
||||
PRIMOUTREG(0x2d00 + 57 * 4, 0); /* Tex stage 0 */
|
||||
PRIMOUTREG(0x2d00 + 53 * 4, 0); /* Tex stage 1 */
|
||||
PRIMOUTREG(0x2d00 + 61 * 4, 0); /* Tex stage 1 */
|
||||
PRIMOUTREG(MGAREG_WR49, 0); /* Tex stage 0 */
|
||||
PRIMOUTREG(MGAREG_WR57, 0); /* Tex stage 0 */
|
||||
PRIMOUTREG(MGAREG_WR53, 0); /* Tex stage 1 */
|
||||
PRIMOUTREG(MGAREG_WR61, 0); /* Tex stage 1 */
|
||||
|
||||
|
||||
PRIMOUTREG(MGAREG_WR54, 0x40); /* Tex stage 0 : w */
|
||||
PRIMOUTREG(MGAREG_WR62, 0x40); /* Tex stage 0 : h */
|
||||
PRIMOUTREG(MGAREG_WR52, 0x40); /* Tex stage 1 : w */
|
||||
PRIMOUTREG(MGAREG_WR60, 0x40); /* Tex stage 1 : h */
|
||||
|
||||
PRIMOUTREG(0x2d00 + 54 * 4, 0x40); /* Tex stage 0 : w */
|
||||
PRIMOUTREG(0x2d00 + 62 * 4, 0x40); /* Tex stage 0 : h */
|
||||
PRIMOUTREG(0x2d00 + 52 * 4, 0x40); /* Tex stage 1 : w */
|
||||
PRIMOUTREG(0x2d00 + 60 * 4, 0x40); /* Tex stage 1 : h */
|
||||
|
||||
/* Dma pading required due to hw bug */
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
|
||||
|
@ -326,12 +355,12 @@ static void mgaG200EmitPipe(drm_mga_private_t * dev_priv)
|
|||
PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend);
|
||||
PRIMOUTREG(MGAREG_WVRTXSZ, 7);
|
||||
PRIMOUTREG(MGAREG_WFLAG, 0);
|
||||
PRIMOUTREG(0x2d00 + 24 * 4, 0); /* tex w/h */
|
||||
PRIMOUTREG(MGAREG_WR24, 0); /* tex w/h */
|
||||
|
||||
PRIMOUTREG(0x2d00 + 25 * 4, 0x100);
|
||||
PRIMOUTREG(0x2d00 + 34 * 4, 0); /* tex w/h */
|
||||
PRIMOUTREG(0x2d00 + 42 * 4, 0xFFFF);
|
||||
PRIMOUTREG(0x2d00 + 60 * 4, 0xFFFF);
|
||||
PRIMOUTREG(MGAREG_WR25, 0x100);
|
||||
PRIMOUTREG(MGAREG_WR34, 0); /* tex w/h */
|
||||
PRIMOUTREG(MGAREG_WR42, 0xFFFF);
|
||||
PRIMOUTREG(MGAREG_WR60, 0xFFFF);
|
||||
|
||||
/* Dma pading required due to hw bug */
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
|
||||
|
@ -495,7 +524,6 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
|||
y2 = length / 64;
|
||||
|
||||
PRIM_OVERFLOW(dev, dev_priv, 30);
|
||||
PRIMGETPTR(dev_priv);
|
||||
|
||||
PRIMOUTREG(MGAREG_DSTORG, destOrg);
|
||||
PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
|
||||
|
@ -513,10 +541,11 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
|||
PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
|
||||
PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_SRCORG, 0);
|
||||
PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
|
@ -529,7 +558,6 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
|
|||
int length = buf->used;
|
||||
int use_agp = PDEA_pagpxfer_enable;
|
||||
int i = 0;
|
||||
int primary_needed;
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
|
@ -545,11 +573,16 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
|
|||
* these numbers (Overestimating this doesn't hurt).
|
||||
*/
|
||||
buf_priv->dispatched = 1;
|
||||
primary_needed = (50 + 15 + 15 + 30 + 25 +
|
||||
10 + 15 * MGA_NR_SAREA_CLIPRECTS);
|
||||
PRIM_OVERFLOW(dev, dev_priv, primary_needed);
|
||||
PRIM_OVERFLOW(dev, dev_priv,
|
||||
(MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
|
||||
mgaEmitState(dev_priv);
|
||||
|
||||
#if 0
|
||||
length = dev_priv->vertexsize * 3 * 4;
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
do {
|
||||
if (i < sarea_priv->nbox) {
|
||||
DRM_DEBUG("idx %d Emit box %d/%d:"
|
||||
|
@ -597,7 +630,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
|
|||
unsigned int address = (unsigned int) buf->bus_address;
|
||||
int use_agp = PDEA_pagpxfer_enable;
|
||||
int i = 0;
|
||||
int primary_needed;
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
|
@ -611,9 +643,9 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
|
|||
* these numbers (Overestimating this doesn't hurt).
|
||||
*/
|
||||
buf_priv->dispatched = 1;
|
||||
primary_needed = (50 + 15 + 15 + 30 + 25 +
|
||||
10 + 15 * MGA_NR_SAREA_CLIPRECTS);
|
||||
PRIM_OVERFLOW(dev, dev_priv, primary_needed);
|
||||
PRIM_OVERFLOW(dev, dev_priv,
|
||||
(MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
|
||||
|
||||
mgaEmitState(dev_priv);
|
||||
|
||||
do {
|
||||
|
@ -639,6 +671,7 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
|
|||
SETADD_mode_vertlist));
|
||||
PRIMOUTREG(MGAREG_SETUPEND,
|
||||
((address + end) | use_agp));
|
||||
|
||||
PRIMADVANCE(dev_priv);
|
||||
} while (++i < sarea_priv->nbox);
|
||||
}
|
||||
|
@ -653,7 +686,10 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
|
|||
|
||||
static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
||||
unsigned int clear_color,
|
||||
unsigned int clear_zval)
|
||||
unsigned int clear_zval,
|
||||
unsigned int clear_colormask,
|
||||
unsigned int clear_depthmask)
|
||||
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
|
@ -662,7 +698,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
drm_clip_rect_t *pbox = sarea_priv->boxes;
|
||||
unsigned int cmd;
|
||||
int i;
|
||||
int primary_needed;
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
|
@ -671,11 +706,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
else
|
||||
cmd = MGA_CLEAR_CMD | DC_atype_rstr;
|
||||
|
||||
primary_needed = nbox * 70;
|
||||
if (primary_needed == 0)
|
||||
primary_needed = 70;
|
||||
PRIM_OVERFLOW(dev, dev_priv, primary_needed);
|
||||
PRIMGETPTR(dev_priv);
|
||||
PRIM_OVERFLOW(dev, dev_priv, 35 * MGA_NR_SAREA_CLIPRECTS);
|
||||
|
||||
for (i = 0; i < nbox; i++) {
|
||||
unsigned int height = pbox[i].y2 - pbox[i].y1;
|
||||
|
@ -687,7 +718,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
if (flags & MGA_FRONT) {
|
||||
DRM_DEBUG("clear front\n");
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
|
||||
PRIMOUTREG(MGAREG_YDSTLEN,
|
||||
(pbox[i].y1 << 16) | height);
|
||||
PRIMOUTREG(MGAREG_FXBNDRY,
|
||||
|
@ -702,7 +733,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
if (flags & MGA_BACK) {
|
||||
DRM_DEBUG("clear back\n");
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
|
||||
PRIMOUTREG(MGAREG_YDSTLEN,
|
||||
(pbox[i].y1 << 16) | height);
|
||||
PRIMOUTREG(MGAREG_FXBNDRY,
|
||||
|
@ -717,7 +748,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
if (flags & MGA_DEPTH) {
|
||||
DRM_DEBUG("clear depth\n");
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
|
||||
PRIMOUTREG(MGAREG_YDSTLEN,
|
||||
(pbox[i].y1 << 16) | height);
|
||||
PRIMOUTREG(MGAREG_FXBNDRY,
|
||||
|
@ -746,31 +777,32 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
|
|||
int nbox = sarea_priv->nbox;
|
||||
drm_clip_rect_t *pbox = sarea_priv->boxes;
|
||||
int i;
|
||||
int primary_needed;
|
||||
int pixel_stride = dev_priv->stride / dev_priv->cpp;
|
||||
|
||||
PRIMLOCALS;
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
primary_needed = nbox * 5;
|
||||
primary_needed += 60;
|
||||
PRIM_OVERFLOW(dev, dev_priv, primary_needed);
|
||||
PRIMGETPTR(dev_priv);
|
||||
PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
|
||||
PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
|
||||
PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
|
||||
PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
|
||||
PRIMOUTREG(MGAREG_AR5, dev_priv->stride / 2);
|
||||
PRIMOUTREG(MGAREG_AR5, pixel_stride);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
|
||||
|
||||
|
||||
for (i = 0; i < nbox; i++) {
|
||||
unsigned int h = pbox[i].y2 - pbox[i].y1;
|
||||
unsigned int start = pbox[i].y1 * dev_priv->stride / 2;
|
||||
|
||||
DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
|
||||
pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
|
||||
unsigned int start = pbox[i].y1 * pixel_stride;
|
||||
|
||||
PRIMOUTREG(MGAREG_AR0, start + pbox[i].x2 - 1);
|
||||
PRIMOUTREG(MGAREG_AR3, start + pbox[i].x1);
|
||||
|
@ -814,7 +846,10 @@ int mga_clear_bufs(dev_t kdev, u_long cmd, caddr_t data,
|
|||
*/
|
||||
dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
|
||||
mga_dma_dispatch_clear(dev, clear.flags,
|
||||
clear.clear_color, clear.clear_depth);
|
||||
clear.clear_color,
|
||||
clear.clear_depth,
|
||||
clear.clear_color_mask,
|
||||
clear.clear_depth_mask);
|
||||
PRIMUPDATE(dev_priv);
|
||||
mga_flush_write_combine();
|
||||
s = splsofttq();
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
KMOD = tdfx
|
||||
SRCS = tdfx_drv.c tdfx_context.c
|
||||
SRCS += device_if.h bus_if.h pci_if.h
|
||||
CFLAGS += ${DEBUG_FLAGS} -I..
|
||||
CFLAGS += ${DEBUG_FLAGS} -I. -I..
|
||||
KMODDEPS = drm
|
||||
|
||||
@:
|
||||
|
|
|
@ -42,7 +42,7 @@ MODULE_DEPEND(tdfx, agp, 1, 1, 1);
|
|||
|
||||
#define TDFX_NAME "tdfx"
|
||||
#define TDFX_DESC "tdfx"
|
||||
#define TDFX_DATE "19991009"
|
||||
#define TDFX_DATE "20000928"
|
||||
#define TDFX_MAJOR 1
|
||||
#define TDFX_MINOR 0
|
||||
#define TDFX_PATCHLEVEL 0
|
||||
|
@ -64,6 +64,9 @@ static int tdfx_probe(device_t dev)
|
|||
case 0x0005121a:
|
||||
s = "3Dfx Voodoo 3 graphics accelerator";
|
||||
break;
|
||||
case 0x0009121a:
|
||||
s = "3Dfx Voodoo 5 graphics accelerator";
|
||||
break;
|
||||
}
|
||||
|
||||
if (s) {
|
||||
|
|
|
@ -52,8 +52,7 @@ int DRM(agp_info)(struct inode *inode, struct file *filp,
|
|||
agp_kern_info *kern;
|
||||
drm_agp_info_t info;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->copy_info)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->copy_info) return -EINVAL;
|
||||
|
||||
kern = &dev->agp->agp_info;
|
||||
info.agp_version_major = kern->version.major;
|
||||
|
@ -78,8 +77,7 @@ int DRM(agp_acquire)(struct inode *inode, struct file *filp,
|
|||
drm_device_t *dev = priv->dev;
|
||||
int retcode;
|
||||
|
||||
if (!dev->agp || dev->agp->acquired || !drm_agp->acquire)
|
||||
return -EINVAL;
|
||||
if (!dev->agp|| dev->agp->acquired || !drm_agp->acquire) return -EINVAL;
|
||||
if ((retcode = drm_agp->acquire())) return retcode;
|
||||
dev->agp->acquired = 1;
|
||||
return 0;
|
||||
|
@ -91,8 +89,7 @@ int DRM(agp_release)(struct inode *inode, struct file *filp,
|
|||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->release)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->release) return -EINVAL;
|
||||
drm_agp->release();
|
||||
dev->agp->acquired = 0;
|
||||
return 0;
|
||||
|
@ -111,8 +108,7 @@ int DRM(agp_enable)(struct inode *inode, struct file *filp,
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_agp_mode_t mode;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->enable)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->enable) return -EINVAL;
|
||||
|
||||
if (copy_from_user(&mode, (drm_agp_mode_t *)arg, sizeof(mode)))
|
||||
return -EFAULT;
|
||||
|
@ -135,7 +131,7 @@ int DRM(agp_alloc)(struct inode *inode, struct file *filp,
|
|||
unsigned long pages;
|
||||
u32 type;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_buffer_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(alloc)(sizeof(*entry), DRM_MEM_AGPLISTS)))
|
||||
|
@ -192,7 +188,7 @@ int DRM(agp_unbind)(struct inode *inode, struct file *filp,
|
|||
drm_agp_binding_t request;
|
||||
drm_agp_mem_t *entry;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_binding_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
@ -211,8 +207,7 @@ int DRM(agp_bind)(struct inode *inode, struct file *filp,
|
|||
int retcode;
|
||||
int page;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->bind_memory)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->bind_memory) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_binding_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
@ -234,7 +229,7 @@ int DRM(agp_free)(struct inode *inode, struct file *filp,
|
|||
drm_agp_buffer_t request;
|
||||
drm_agp_mem_t *entry;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_buffer_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
|
|
@ -37,10 +37,6 @@
|
|||
#define __HAVE_PCI_DMA 0
|
||||
#endif
|
||||
|
||||
#ifndef __HAVE_SG
|
||||
#define __HAVE_SG 0
|
||||
#endif
|
||||
|
||||
#ifndef DRIVER_BUF_PRIV_T
|
||||
#define DRIVER_BUF_PRIV_T u32
|
||||
#endif
|
||||
|
@ -107,16 +103,13 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
|
|||
switch ( map->type ) {
|
||||
case _DRM_REGISTERS:
|
||||
case _DRM_FRAME_BUFFER:
|
||||
#if !defined(__sparc__) && !defined(__alpha__)
|
||||
#ifndef __sparc__
|
||||
if ( map->offset + map->size < map->offset ||
|
||||
map->offset < virt_to_phys(high_memory) ) {
|
||||
DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
#ifdef __alpha__
|
||||
map->offset += dev->hose->mem_space->start;
|
||||
#endif
|
||||
#if __REALLY_HAVE_MTRR
|
||||
if ( map->type == _DRM_FRAME_BUFFER ||
|
||||
(map->flags & _DRM_WRITE_COMBINING) ) {
|
||||
|
@ -142,21 +135,10 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
|
|||
break;
|
||||
#if __REALLY_HAVE_AGP
|
||||
case _DRM_AGP:
|
||||
#ifdef __alpha__
|
||||
map->offset += dev->hose->mem_space->start;
|
||||
#endif
|
||||
map->offset = map->offset + dev->agp->base;
|
||||
map->mtrr = dev->agp->agp_mtrr; /* for getmap */
|
||||
break;
|
||||
#endif
|
||||
case _DRM_SCATTER_GATHER:
|
||||
if (!dev->sg) {
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
return -EINVAL;
|
||||
}
|
||||
map->offset = map->offset + dev->sg->handle;
|
||||
break;
|
||||
|
||||
default:
|
||||
DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
|
||||
return -EINVAL;
|
||||
|
@ -255,7 +237,6 @@ int DRM(rmmap)(struct inode *inode, struct file *filp,
|
|||
vfree(map->handle);
|
||||
break;
|
||||
case _DRM_AGP:
|
||||
case _DRM_SCATTER_GATHER:
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
|
@ -584,159 +565,6 @@ int DRM(addbufs_pci)( struct inode *inode, struct file *filp,
|
|||
}
|
||||
#endif /* __HAVE_PCI_DMA */
|
||||
|
||||
#ifdef __HAVE_SG
|
||||
int DRM(addbufs_sg)( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg )
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_desc_t request;
|
||||
drm_buf_entry_t *entry;
|
||||
drm_buf_t *buf;
|
||||
unsigned long offset;
|
||||
unsigned long agp_offset;
|
||||
int count;
|
||||
int order;
|
||||
int size;
|
||||
int alignment;
|
||||
int page_order;
|
||||
int total;
|
||||
int byte_count;
|
||||
int i;
|
||||
|
||||
if ( !dma ) return -EINVAL;
|
||||
|
||||
if ( copy_from_user( &request, (drm_buf_desc_t *)arg,
|
||||
sizeof(request) ) )
|
||||
return -EFAULT;
|
||||
|
||||
count = request.count;
|
||||
order = DRM(order)( request.size );
|
||||
size = 1 << order;
|
||||
|
||||
alignment = (request.flags & _DRM_PAGE_ALIGN)
|
||||
? PAGE_ALIGN(size) : size;
|
||||
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
|
||||
total = PAGE_SIZE << page_order;
|
||||
|
||||
byte_count = 0;
|
||||
agp_offset = request.agp_start;
|
||||
|
||||
DRM_DEBUG( "count: %d\n", count );
|
||||
DRM_DEBUG( "order: %d\n", order );
|
||||
DRM_DEBUG( "size: %d\n", size );
|
||||
DRM_DEBUG( "agp_offset: %ld\n", agp_offset );
|
||||
DRM_DEBUG( "alignment: %d\n", alignment );
|
||||
DRM_DEBUG( "page_order: %d\n", page_order );
|
||||
DRM_DEBUG( "total: %d\n", total );
|
||||
|
||||
if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
|
||||
if ( dev->queue_count ) return -EBUSY; /* Not while in use */
|
||||
|
||||
spin_lock( &dev->count_lock );
|
||||
if ( dev->buf_use ) {
|
||||
spin_unlock( &dev->count_lock );
|
||||
return -EBUSY;
|
||||
}
|
||||
atomic_inc( &dev->buf_alloc );
|
||||
spin_unlock( &dev->count_lock );
|
||||
|
||||
down( &dev->struct_sem );
|
||||
entry = &dma->bufs[order];
|
||||
if ( entry->buf_count ) {
|
||||
up( &dev->struct_sem );
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return -ENOMEM; /* May only call once for each order */
|
||||
}
|
||||
|
||||
entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
|
||||
DRM_MEM_BUFS );
|
||||
if ( !entry->buflist ) {
|
||||
up( &dev->struct_sem );
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return -ENOMEM;
|
||||
}
|
||||
memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
|
||||
|
||||
entry->buf_size = size;
|
||||
entry->page_order = page_order;
|
||||
|
||||
offset = 0;
|
||||
|
||||
while ( entry->buf_count < count ) {
|
||||
buf = &entry->buflist[entry->buf_count];
|
||||
buf->idx = dma->buf_count + entry->buf_count;
|
||||
buf->total = alignment;
|
||||
buf->order = order;
|
||||
buf->used = 0;
|
||||
|
||||
buf->offset = (dma->byte_count + offset);
|
||||
buf->bus_address = agp_offset + offset;
|
||||
buf->address = (void *)(agp_offset + offset + dev->sg->handle);
|
||||
buf->next = NULL;
|
||||
buf->waiting = 0;
|
||||
buf->pending = 0;
|
||||
init_waitqueue_head( &buf->dma_wait );
|
||||
buf->pid = 0;
|
||||
|
||||
buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
|
||||
buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
|
||||
DRM_MEM_BUFS );
|
||||
memset( buf->dev_private, 0, buf->dev_priv_size );
|
||||
|
||||
#if __HAVE_DMA_HISTOGRAM
|
||||
buf->time_queued = 0;
|
||||
buf->time_dispatched = 0;
|
||||
buf->time_completed = 0;
|
||||
buf->time_freed = 0;
|
||||
#endif
|
||||
DRM_DEBUG( "buffer %d @ %p\n",
|
||||
entry->buf_count, buf->address );
|
||||
|
||||
offset += alignment;
|
||||
entry->buf_count++;
|
||||
byte_count += PAGE_SIZE << page_order;
|
||||
}
|
||||
|
||||
DRM_DEBUG( "byte_count: %d\n", byte_count );
|
||||
|
||||
dma->buflist = DRM(realloc)( dma->buflist,
|
||||
dma->buf_count * sizeof(*dma->buflist),
|
||||
(dma->buf_count + entry->buf_count)
|
||||
* sizeof(*dma->buflist),
|
||||
DRM_MEM_BUFS );
|
||||
for ( i = 0 ; i < entry->buf_count ; i++ ) {
|
||||
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
|
||||
}
|
||||
|
||||
dma->buf_count += entry->buf_count;
|
||||
dma->byte_count += byte_count;
|
||||
|
||||
DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
|
||||
DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
|
||||
|
||||
#if __HAVE_DMA_FREELIST
|
||||
DRM(freelist_create)( &entry->freelist, entry->buf_count );
|
||||
for ( i = 0 ; i < entry->buf_count ; i++ ) {
|
||||
DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] );
|
||||
}
|
||||
#endif
|
||||
up( &dev->struct_sem );
|
||||
|
||||
request.count = entry->buf_count;
|
||||
request.size = size;
|
||||
|
||||
if ( copy_to_user( (drm_buf_desc_t *)arg, &request, sizeof(request) ) )
|
||||
return -EFAULT;
|
||||
|
||||
dma->flags = _DRM_DMA_USE_SG;
|
||||
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return 0;
|
||||
}
|
||||
#endif /* __HAVE_SG */
|
||||
|
||||
int DRM(addbufs)( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg )
|
||||
{
|
||||
|
@ -751,11 +579,6 @@ int DRM(addbufs)( struct inode *inode, struct file *filp,
|
|||
return DRM(addbufs_agp)( inode, filp, cmd, arg );
|
||||
else
|
||||
#endif
|
||||
#if __HAVE_SG
|
||||
if ( request.flags & _DRM_SG_BUFFER )
|
||||
return DRM(addbufs_sg)( inode, filp, cmd, arg );
|
||||
else
|
||||
#endif
|
||||
#if __HAVE_PCI_DMA
|
||||
return DRM(addbufs_pci)( inode, filp, cmd, arg );
|
||||
#else
|
||||
|
@ -937,8 +760,7 @@ int DRM(mapbufs)( struct inode *inode, struct file *filp,
|
|||
return -EFAULT;
|
||||
|
||||
if ( request.count >= dma->buf_count ) {
|
||||
if ( (__HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP)) ||
|
||||
(__HAVE_SG && (dma->flags & _DRM_DMA_USE_SG)) ) {
|
||||
if ( __HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP) ) {
|
||||
drm_map_t *map = DRIVER_AGP_BUFFERS_MAP( dev );
|
||||
|
||||
if ( !map ) {
|
||||
|
@ -946,34 +768,18 @@ int DRM(mapbufs)( struct inode *inode, struct file *filp,
|
|||
goto done;
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
down( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
down_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
virtual = do_mmap( filp, 0, map->size,
|
||||
PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED,
|
||||
(unsigned long)map->offset );
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
up( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
up_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
} else {
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
down( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
down_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
virtual = do_mmap( filp, 0, dma->byte_count,
|
||||
PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, 0 );
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
up( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
up_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
}
|
||||
if ( virtual > -1024UL ) {
|
||||
/* Real error */
|
||||
|
|
|
@ -81,9 +81,6 @@
|
|||
#ifndef __HAVE_COUNTERS
|
||||
#define __HAVE_COUNTERS 0
|
||||
#endif
|
||||
#ifndef __HAVE_SG
|
||||
#define __HAVE_SG 0
|
||||
#endif
|
||||
|
||||
#ifndef DRIVER_PREINIT
|
||||
#define DRIVER_PREINIT()
|
||||
|
@ -181,11 +178,6 @@ static drm_ioctl_desc_t DRM(ioctls)[] = {
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
|
||||
#endif
|
||||
|
||||
#if __HAVE_SG
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { DRM(sg_alloc), 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 },
|
||||
#endif
|
||||
|
||||
DRIVER_IOCTLS
|
||||
};
|
||||
|
||||
|
@ -423,17 +415,6 @@ static int DRM(takedown)( drm_device_t *dev )
|
|||
* handled in the AGP/GART driver.
|
||||
*/
|
||||
break;
|
||||
case _DRM_SCATTER_GATHER:
|
||||
/* Handle it, but do nothing, if HAVE_SG
|
||||
* isn't defined.
|
||||
*/
|
||||
#if __HAVE_SG
|
||||
if(dev->sg) {
|
||||
DRM(sg_cleanup)(dev->sg);
|
||||
dev->sg = NULL;
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
}
|
||||
|
|
|
@ -70,21 +70,6 @@ int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev)
|
|||
}
|
||||
up(&dev->struct_sem);
|
||||
|
||||
#ifdef __alpha__
|
||||
/*
|
||||
* Default the hose
|
||||
*/
|
||||
if (!dev->hose) {
|
||||
struct pci_dev *pci_dev;
|
||||
pci_dev = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, NULL);
|
||||
if (pci_dev) dev->hose = pci_dev->sysdata;
|
||||
if (!dev->hose) {
|
||||
struct pci_bus *b = pci_bus_b(pci_root_buses.next);
|
||||
if (b) dev->hose = b->sysdata;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -32,11 +32,7 @@
|
|||
#define __NO_VERSION__
|
||||
#include "drmP.h"
|
||||
|
||||
#if 0
|
||||
int DRM(flags) = DRM_FLAG_DEBUG;
|
||||
#else
|
||||
int DRM(flags) = 0;
|
||||
#endif
|
||||
|
||||
/* drm_parse_option parses a single option. See description for
|
||||
* drm_parse_options for details.
|
||||
|
|
|
@ -95,27 +95,6 @@ int DRM(setunique)(struct inode *inode, struct file *filp,
|
|||
DRM_MEM_DRIVER);
|
||||
sprintf(dev->devname, "%s@%s", dev->name, dev->unique);
|
||||
|
||||
#ifdef __alpha__
|
||||
do {
|
||||
struct pci_dev *pci_dev;
|
||||
int b, d, f;
|
||||
char *p;
|
||||
|
||||
for(p = dev->unique; p && *p && *p != ':'; p++);
|
||||
if (!p || !*p) break;
|
||||
b = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p != ':') break;
|
||||
d = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p != ':') break;
|
||||
f = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p) break;
|
||||
|
||||
pci_dev = pci_find_slot(b, PCI_DEVFN(d,f));
|
||||
if (pci_dev)
|
||||
dev->hose = pci_dev->sysdata;
|
||||
} while(0);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -63,7 +63,6 @@ static drm_mem_stats_t DRM(mem_stats)[] = {
|
|||
[DRM_MEM_MAPPINGS] = { "mappings" },
|
||||
[DRM_MEM_BUFLISTS] = { "buflists" },
|
||||
[DRM_MEM_AGPLISTS] = { "agplist" },
|
||||
[DRM_MEM_SGLISTS] = { "sglist" },
|
||||
[DRM_MEM_TOTALAGP] = { "totalagp" },
|
||||
[DRM_MEM_BOUNDAGP] = { "boundagp" },
|
||||
[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
|
||||
|
|
|
@ -50,12 +50,6 @@ struct vm_operations_struct drm_vm_dma_ops = {
|
|||
close: DRM(vm_close),
|
||||
};
|
||||
|
||||
struct vm_operations_struct drm_vm_sg_ops = {
|
||||
nopage: DRM(vm_sg_nopage),
|
||||
open: DRM(vm_open),
|
||||
close: DRM(vm_close),
|
||||
};
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
unsigned long DRM(vm_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
|
@ -99,7 +93,7 @@ struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
|
|||
offset = address - vma->vm_start;
|
||||
i = (unsigned long)map->handle + offset;
|
||||
/* We have to walk page tables here because we need large SAREA's, and
|
||||
* they need to be virtually contiguous in kernel space.
|
||||
* they need to be virtually contigious in kernel space.
|
||||
*/
|
||||
pgd = pgd_offset_k( i );
|
||||
if( !pgd_present( *pgd ) ) return NOPAGE_OOM;
|
||||
|
@ -193,7 +187,6 @@ void DRM(vm_shm_close)(struct vm_area_struct *vma)
|
|||
vfree(map->handle);
|
||||
break;
|
||||
case _DRM_AGP:
|
||||
case _DRM_SCATTER_GATHER:
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
|
@ -237,48 +230,6 @@ struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
|
|||
#endif
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
unsigned long DRM(vm_sg_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
int write_access)
|
||||
#else
|
||||
/* Return type changed in 2.3.23 */
|
||||
struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
int write_access)
|
||||
#endif
|
||||
{
|
||||
#if LINUX_VERSION_CODE >= 0x020300
|
||||
drm_map_t *map = (drm_map_t *)vma->vm_private_data;
|
||||
#else
|
||||
drm_map_t *map = (drm_map_t *)vma->vm_pte;
|
||||
#endif
|
||||
drm_file_t *priv = vma->vm_file->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_sg_mem_t *entry = dev->sg;
|
||||
unsigned long offset;
|
||||
unsigned long map_offset;
|
||||
unsigned long page_offset;
|
||||
struct page *page;
|
||||
|
||||
if (!entry) return NOPAGE_SIGBUS; /* Error */
|
||||
if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */
|
||||
if (!entry->pagelist) return NOPAGE_OOM ; /* Nothing allocated */
|
||||
|
||||
|
||||
offset = address - vma->vm_start;
|
||||
map_offset = map->offset - dev->sg->handle;
|
||||
page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT);
|
||||
page = entry->pagelist[page_offset];
|
||||
atomic_inc(&page->count); /* Dec. by kernel */
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
return (unsigned long)virt_to_phys(page->virtual);
|
||||
#else
|
||||
return page;
|
||||
#endif
|
||||
}
|
||||
|
||||
void DRM(vm_open)(struct vm_area_struct *vma)
|
||||
{
|
||||
drm_file_t *priv = vma->vm_file->private_data;
|
||||
|
@ -371,7 +322,6 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_map_t *map = NULL;
|
||||
drm_map_list_t *r_list;
|
||||
unsigned long offset = 0;
|
||||
struct list_head *list;
|
||||
|
||||
DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n",
|
||||
|
@ -424,26 +374,19 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
}
|
||||
#elif defined(__ia64__)
|
||||
if (map->type != _DRM_AGP)
|
||||
vma->vm_page_prot =
|
||||
pgprot_writecombine(vma->vm_page_prot);
|
||||
#elif defined(__powerpc__)
|
||||
pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED;
|
||||
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
|
||||
#endif
|
||||
vma->vm_flags |= VM_IO; /* not in core dump */
|
||||
}
|
||||
#ifdef __alpha__
|
||||
offset = dev->hose->dense_mem_base -
|
||||
dev->hose->mem_space->start;
|
||||
#endif
|
||||
if (remap_page_range(vma->vm_start,
|
||||
VM_OFFSET(vma) + offset,
|
||||
VM_OFFSET(vma),
|
||||
vma->vm_end - vma->vm_start,
|
||||
vma->vm_page_prot))
|
||||
return -EAGAIN;
|
||||
DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
|
||||
" offset = 0x%lx\n",
|
||||
map->type,
|
||||
vma->vm_start, vma->vm_end, VM_OFFSET(vma) + offset);
|
||||
vma->vm_start, vma->vm_end, VM_OFFSET(vma));
|
||||
vma->vm_ops = &drm_vm_ops;
|
||||
break;
|
||||
case _DRM_SHM:
|
||||
|
@ -457,15 +400,6 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
DRM_KERNEL advisory is supported. */
|
||||
vma->vm_flags |= VM_LOCKED;
|
||||
break;
|
||||
case _DRM_SCATTER_GATHER:
|
||||
vma->vm_ops = &drm_vm_sg_ops;
|
||||
#if LINUX_VERSION_CODE >= 0x020300
|
||||
vma->vm_private_data = (void *)map;
|
||||
#else
|
||||
vma->vm_pte = (unsigned long)map;
|
||||
#endif
|
||||
vma->vm_flags |= VM_LOCKED;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL; /* This should never happen. */
|
||||
}
|
||||
|
|
|
@ -52,8 +52,7 @@ int DRM(agp_info)(struct inode *inode, struct file *filp,
|
|||
agp_kern_info *kern;
|
||||
drm_agp_info_t info;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->copy_info)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->copy_info) return -EINVAL;
|
||||
|
||||
kern = &dev->agp->agp_info;
|
||||
info.agp_version_major = kern->version.major;
|
||||
|
@ -78,8 +77,7 @@ int DRM(agp_acquire)(struct inode *inode, struct file *filp,
|
|||
drm_device_t *dev = priv->dev;
|
||||
int retcode;
|
||||
|
||||
if (!dev->agp || dev->agp->acquired || !drm_agp->acquire)
|
||||
return -EINVAL;
|
||||
if (!dev->agp|| dev->agp->acquired || !drm_agp->acquire) return -EINVAL;
|
||||
if ((retcode = drm_agp->acquire())) return retcode;
|
||||
dev->agp->acquired = 1;
|
||||
return 0;
|
||||
|
@ -91,8 +89,7 @@ int DRM(agp_release)(struct inode *inode, struct file *filp,
|
|||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->release)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->release) return -EINVAL;
|
||||
drm_agp->release();
|
||||
dev->agp->acquired = 0;
|
||||
return 0;
|
||||
|
@ -111,8 +108,7 @@ int DRM(agp_enable)(struct inode *inode, struct file *filp,
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_agp_mode_t mode;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->enable)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->enable) return -EINVAL;
|
||||
|
||||
if (copy_from_user(&mode, (drm_agp_mode_t *)arg, sizeof(mode)))
|
||||
return -EFAULT;
|
||||
|
@ -135,7 +131,7 @@ int DRM(agp_alloc)(struct inode *inode, struct file *filp,
|
|||
unsigned long pages;
|
||||
u32 type;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_buffer_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(alloc)(sizeof(*entry), DRM_MEM_AGPLISTS)))
|
||||
|
@ -192,7 +188,7 @@ int DRM(agp_unbind)(struct inode *inode, struct file *filp,
|
|||
drm_agp_binding_t request;
|
||||
drm_agp_mem_t *entry;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_binding_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
@ -211,8 +207,7 @@ int DRM(agp_bind)(struct inode *inode, struct file *filp,
|
|||
int retcode;
|
||||
int page;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired || !drm_agp->bind_memory)
|
||||
return -EINVAL;
|
||||
if (!dev->agp->acquired || !drm_agp->bind_memory) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_binding_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
@ -234,7 +229,7 @@ int DRM(agp_free)(struct inode *inode, struct file *filp,
|
|||
drm_agp_buffer_t request;
|
||||
drm_agp_mem_t *entry;
|
||||
|
||||
if (!dev->agp || !dev->agp->acquired) return -EINVAL;
|
||||
if (!dev->agp->acquired) return -EINVAL;
|
||||
if (copy_from_user(&request, (drm_agp_buffer_t *)arg, sizeof(request)))
|
||||
return -EFAULT;
|
||||
if (!(entry = DRM(agp_lookup_entry)(dev, request.handle)))
|
||||
|
|
198
linux/drm_bufs.h
198
linux/drm_bufs.h
|
@ -37,10 +37,6 @@
|
|||
#define __HAVE_PCI_DMA 0
|
||||
#endif
|
||||
|
||||
#ifndef __HAVE_SG
|
||||
#define __HAVE_SG 0
|
||||
#endif
|
||||
|
||||
#ifndef DRIVER_BUF_PRIV_T
|
||||
#define DRIVER_BUF_PRIV_T u32
|
||||
#endif
|
||||
|
@ -107,16 +103,13 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
|
|||
switch ( map->type ) {
|
||||
case _DRM_REGISTERS:
|
||||
case _DRM_FRAME_BUFFER:
|
||||
#if !defined(__sparc__) && !defined(__alpha__)
|
||||
#ifndef __sparc__
|
||||
if ( map->offset + map->size < map->offset ||
|
||||
map->offset < virt_to_phys(high_memory) ) {
|
||||
DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
#ifdef __alpha__
|
||||
map->offset += dev->hose->mem_space->start;
|
||||
#endif
|
||||
#if __REALLY_HAVE_MTRR
|
||||
if ( map->type == _DRM_FRAME_BUFFER ||
|
||||
(map->flags & _DRM_WRITE_COMBINING) ) {
|
||||
|
@ -142,21 +135,10 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
|
|||
break;
|
||||
#if __REALLY_HAVE_AGP
|
||||
case _DRM_AGP:
|
||||
#ifdef __alpha__
|
||||
map->offset += dev->hose->mem_space->start;
|
||||
#endif
|
||||
map->offset = map->offset + dev->agp->base;
|
||||
map->mtrr = dev->agp->agp_mtrr; /* for getmap */
|
||||
break;
|
||||
#endif
|
||||
case _DRM_SCATTER_GATHER:
|
||||
if (!dev->sg) {
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
return -EINVAL;
|
||||
}
|
||||
map->offset = map->offset + dev->sg->handle;
|
||||
break;
|
||||
|
||||
default:
|
||||
DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
|
||||
return -EINVAL;
|
||||
|
@ -255,7 +237,6 @@ int DRM(rmmap)(struct inode *inode, struct file *filp,
|
|||
vfree(map->handle);
|
||||
break;
|
||||
case _DRM_AGP:
|
||||
case _DRM_SCATTER_GATHER:
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
|
@ -584,159 +565,6 @@ int DRM(addbufs_pci)( struct inode *inode, struct file *filp,
|
|||
}
|
||||
#endif /* __HAVE_PCI_DMA */
|
||||
|
||||
#ifdef __HAVE_SG
|
||||
int DRM(addbufs_sg)( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg )
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_desc_t request;
|
||||
drm_buf_entry_t *entry;
|
||||
drm_buf_t *buf;
|
||||
unsigned long offset;
|
||||
unsigned long agp_offset;
|
||||
int count;
|
||||
int order;
|
||||
int size;
|
||||
int alignment;
|
||||
int page_order;
|
||||
int total;
|
||||
int byte_count;
|
||||
int i;
|
||||
|
||||
if ( !dma ) return -EINVAL;
|
||||
|
||||
if ( copy_from_user( &request, (drm_buf_desc_t *)arg,
|
||||
sizeof(request) ) )
|
||||
return -EFAULT;
|
||||
|
||||
count = request.count;
|
||||
order = DRM(order)( request.size );
|
||||
size = 1 << order;
|
||||
|
||||
alignment = (request.flags & _DRM_PAGE_ALIGN)
|
||||
? PAGE_ALIGN(size) : size;
|
||||
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
|
||||
total = PAGE_SIZE << page_order;
|
||||
|
||||
byte_count = 0;
|
||||
agp_offset = request.agp_start;
|
||||
|
||||
DRM_DEBUG( "count: %d\n", count );
|
||||
DRM_DEBUG( "order: %d\n", order );
|
||||
DRM_DEBUG( "size: %d\n", size );
|
||||
DRM_DEBUG( "agp_offset: %ld\n", agp_offset );
|
||||
DRM_DEBUG( "alignment: %d\n", alignment );
|
||||
DRM_DEBUG( "page_order: %d\n", page_order );
|
||||
DRM_DEBUG( "total: %d\n", total );
|
||||
|
||||
if ( order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ) return -EINVAL;
|
||||
if ( dev->queue_count ) return -EBUSY; /* Not while in use */
|
||||
|
||||
spin_lock( &dev->count_lock );
|
||||
if ( dev->buf_use ) {
|
||||
spin_unlock( &dev->count_lock );
|
||||
return -EBUSY;
|
||||
}
|
||||
atomic_inc( &dev->buf_alloc );
|
||||
spin_unlock( &dev->count_lock );
|
||||
|
||||
down( &dev->struct_sem );
|
||||
entry = &dma->bufs[order];
|
||||
if ( entry->buf_count ) {
|
||||
up( &dev->struct_sem );
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return -ENOMEM; /* May only call once for each order */
|
||||
}
|
||||
|
||||
entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
|
||||
DRM_MEM_BUFS );
|
||||
if ( !entry->buflist ) {
|
||||
up( &dev->struct_sem );
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return -ENOMEM;
|
||||
}
|
||||
memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
|
||||
|
||||
entry->buf_size = size;
|
||||
entry->page_order = page_order;
|
||||
|
||||
offset = 0;
|
||||
|
||||
while ( entry->buf_count < count ) {
|
||||
buf = &entry->buflist[entry->buf_count];
|
||||
buf->idx = dma->buf_count + entry->buf_count;
|
||||
buf->total = alignment;
|
||||
buf->order = order;
|
||||
buf->used = 0;
|
||||
|
||||
buf->offset = (dma->byte_count + offset);
|
||||
buf->bus_address = agp_offset + offset;
|
||||
buf->address = (void *)(agp_offset + offset + dev->sg->handle);
|
||||
buf->next = NULL;
|
||||
buf->waiting = 0;
|
||||
buf->pending = 0;
|
||||
init_waitqueue_head( &buf->dma_wait );
|
||||
buf->pid = 0;
|
||||
|
||||
buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
|
||||
buf->dev_private = DRM(alloc)( sizeof(DRIVER_BUF_PRIV_T),
|
||||
DRM_MEM_BUFS );
|
||||
memset( buf->dev_private, 0, buf->dev_priv_size );
|
||||
|
||||
#if __HAVE_DMA_HISTOGRAM
|
||||
buf->time_queued = 0;
|
||||
buf->time_dispatched = 0;
|
||||
buf->time_completed = 0;
|
||||
buf->time_freed = 0;
|
||||
#endif
|
||||
DRM_DEBUG( "buffer %d @ %p\n",
|
||||
entry->buf_count, buf->address );
|
||||
|
||||
offset += alignment;
|
||||
entry->buf_count++;
|
||||
byte_count += PAGE_SIZE << page_order;
|
||||
}
|
||||
|
||||
DRM_DEBUG( "byte_count: %d\n", byte_count );
|
||||
|
||||
dma->buflist = DRM(realloc)( dma->buflist,
|
||||
dma->buf_count * sizeof(*dma->buflist),
|
||||
(dma->buf_count + entry->buf_count)
|
||||
* sizeof(*dma->buflist),
|
||||
DRM_MEM_BUFS );
|
||||
for ( i = 0 ; i < entry->buf_count ; i++ ) {
|
||||
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
|
||||
}
|
||||
|
||||
dma->buf_count += entry->buf_count;
|
||||
dma->byte_count += byte_count;
|
||||
|
||||
DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
|
||||
DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
|
||||
|
||||
#if __HAVE_DMA_FREELIST
|
||||
DRM(freelist_create)( &entry->freelist, entry->buf_count );
|
||||
for ( i = 0 ; i < entry->buf_count ; i++ ) {
|
||||
DRM(freelist_put)( dev, &entry->freelist, &entry->buflist[i] );
|
||||
}
|
||||
#endif
|
||||
up( &dev->struct_sem );
|
||||
|
||||
request.count = entry->buf_count;
|
||||
request.size = size;
|
||||
|
||||
if ( copy_to_user( (drm_buf_desc_t *)arg, &request, sizeof(request) ) )
|
||||
return -EFAULT;
|
||||
|
||||
dma->flags = _DRM_DMA_USE_SG;
|
||||
|
||||
atomic_dec( &dev->buf_alloc );
|
||||
return 0;
|
||||
}
|
||||
#endif /* __HAVE_SG */
|
||||
|
||||
int DRM(addbufs)( struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg )
|
||||
{
|
||||
|
@ -751,11 +579,6 @@ int DRM(addbufs)( struct inode *inode, struct file *filp,
|
|||
return DRM(addbufs_agp)( inode, filp, cmd, arg );
|
||||
else
|
||||
#endif
|
||||
#if __HAVE_SG
|
||||
if ( request.flags & _DRM_SG_BUFFER )
|
||||
return DRM(addbufs_sg)( inode, filp, cmd, arg );
|
||||
else
|
||||
#endif
|
||||
#if __HAVE_PCI_DMA
|
||||
return DRM(addbufs_pci)( inode, filp, cmd, arg );
|
||||
#else
|
||||
|
@ -937,8 +760,7 @@ int DRM(mapbufs)( struct inode *inode, struct file *filp,
|
|||
return -EFAULT;
|
||||
|
||||
if ( request.count >= dma->buf_count ) {
|
||||
if ( (__HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP)) ||
|
||||
(__HAVE_SG && (dma->flags & _DRM_DMA_USE_SG)) ) {
|
||||
if ( __HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP) ) {
|
||||
drm_map_t *map = DRIVER_AGP_BUFFERS_MAP( dev );
|
||||
|
||||
if ( !map ) {
|
||||
|
@ -946,34 +768,18 @@ int DRM(mapbufs)( struct inode *inode, struct file *filp,
|
|||
goto done;
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
down( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
down_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
virtual = do_mmap( filp, 0, map->size,
|
||||
PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED,
|
||||
(unsigned long)map->offset );
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
up( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
up_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
} else {
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
down( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
down_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
virtual = do_mmap( filp, 0, dma->byte_count,
|
||||
PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED, 0 );
|
||||
#if LINUX_VERSION_CODE <= 0x020402
|
||||
up( ¤t->mm->mmap_sem );
|
||||
#else
|
||||
up_write( ¤t->mm->mmap_sem );
|
||||
#endif
|
||||
}
|
||||
if ( virtual > -1024UL ) {
|
||||
/* Real error */
|
||||
|
|
|
@ -81,9 +81,6 @@
|
|||
#ifndef __HAVE_COUNTERS
|
||||
#define __HAVE_COUNTERS 0
|
||||
#endif
|
||||
#ifndef __HAVE_SG
|
||||
#define __HAVE_SG 0
|
||||
#endif
|
||||
|
||||
#ifndef DRIVER_PREINIT
|
||||
#define DRIVER_PREINIT()
|
||||
|
@ -181,11 +178,6 @@ static drm_ioctl_desc_t DRM(ioctls)[] = {
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
|
||||
#endif
|
||||
|
||||
#if __HAVE_SG
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)] = { DRM(sg_alloc), 1, 1 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)] = { DRM(sg_free), 1, 1 },
|
||||
#endif
|
||||
|
||||
DRIVER_IOCTLS
|
||||
};
|
||||
|
||||
|
@ -423,17 +415,6 @@ static int DRM(takedown)( drm_device_t *dev )
|
|||
* handled in the AGP/GART driver.
|
||||
*/
|
||||
break;
|
||||
case _DRM_SCATTER_GATHER:
|
||||
/* Handle it, but do nothing, if HAVE_SG
|
||||
* isn't defined.
|
||||
*/
|
||||
#if __HAVE_SG
|
||||
if(dev->sg) {
|
||||
DRM(sg_cleanup)(dev->sg);
|
||||
dev->sg = NULL;
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
}
|
||||
|
|
|
@ -70,21 +70,6 @@ int DRM(open_helper)(struct inode *inode, struct file *filp, drm_device_t *dev)
|
|||
}
|
||||
up(&dev->struct_sem);
|
||||
|
||||
#ifdef __alpha__
|
||||
/*
|
||||
* Default the hose
|
||||
*/
|
||||
if (!dev->hose) {
|
||||
struct pci_dev *pci_dev;
|
||||
pci_dev = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8, NULL);
|
||||
if (pci_dev) dev->hose = pci_dev->sysdata;
|
||||
if (!dev->hose) {
|
||||
struct pci_bus *b = pci_bus_b(pci_root_buses.next);
|
||||
if (b) dev->hose = b->sysdata;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -32,11 +32,7 @@
|
|||
#define __NO_VERSION__
|
||||
#include "drmP.h"
|
||||
|
||||
#if 0
|
||||
int DRM(flags) = DRM_FLAG_DEBUG;
|
||||
#else
|
||||
int DRM(flags) = 0;
|
||||
#endif
|
||||
|
||||
/* drm_parse_option parses a single option. See description for
|
||||
* drm_parse_options for details.
|
||||
|
|
|
@ -95,27 +95,6 @@ int DRM(setunique)(struct inode *inode, struct file *filp,
|
|||
DRM_MEM_DRIVER);
|
||||
sprintf(dev->devname, "%s@%s", dev->name, dev->unique);
|
||||
|
||||
#ifdef __alpha__
|
||||
do {
|
||||
struct pci_dev *pci_dev;
|
||||
int b, d, f;
|
||||
char *p;
|
||||
|
||||
for(p = dev->unique; p && *p && *p != ':'; p++);
|
||||
if (!p || !*p) break;
|
||||
b = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p != ':') break;
|
||||
d = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p != ':') break;
|
||||
f = (int)simple_strtoul(p+1, &p, 10);
|
||||
if (*p) break;
|
||||
|
||||
pci_dev = pci_find_slot(b, PCI_DEVFN(d,f));
|
||||
if (pci_dev)
|
||||
dev->hose = pci_dev->sysdata;
|
||||
} while(0);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -63,7 +63,6 @@ static drm_mem_stats_t DRM(mem_stats)[] = {
|
|||
[DRM_MEM_MAPPINGS] = { "mappings" },
|
||||
[DRM_MEM_BUFLISTS] = { "buflists" },
|
||||
[DRM_MEM_AGPLISTS] = { "agplist" },
|
||||
[DRM_MEM_SGLISTS] = { "sglist" },
|
||||
[DRM_MEM_TOTALAGP] = { "totalagp" },
|
||||
[DRM_MEM_BOUNDAGP] = { "boundagp" },
|
||||
[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
|
||||
|
|
|
@ -50,12 +50,6 @@ struct vm_operations_struct drm_vm_dma_ops = {
|
|||
close: DRM(vm_close),
|
||||
};
|
||||
|
||||
struct vm_operations_struct drm_vm_sg_ops = {
|
||||
nopage: DRM(vm_sg_nopage),
|
||||
open: DRM(vm_open),
|
||||
close: DRM(vm_close),
|
||||
};
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
unsigned long DRM(vm_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
|
@ -99,7 +93,7 @@ struct page *DRM(vm_shm_nopage)(struct vm_area_struct *vma,
|
|||
offset = address - vma->vm_start;
|
||||
i = (unsigned long)map->handle + offset;
|
||||
/* We have to walk page tables here because we need large SAREA's, and
|
||||
* they need to be virtually contiguous in kernel space.
|
||||
* they need to be virtually contigious in kernel space.
|
||||
*/
|
||||
pgd = pgd_offset_k( i );
|
||||
if( !pgd_present( *pgd ) ) return NOPAGE_OOM;
|
||||
|
@ -193,7 +187,6 @@ void DRM(vm_shm_close)(struct vm_area_struct *vma)
|
|||
vfree(map->handle);
|
||||
break;
|
||||
case _DRM_AGP:
|
||||
case _DRM_SCATTER_GATHER:
|
||||
break;
|
||||
}
|
||||
DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
|
||||
|
@ -237,48 +230,6 @@ struct page *DRM(vm_dma_nopage)(struct vm_area_struct *vma,
|
|||
#endif
|
||||
}
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
unsigned long DRM(vm_sg_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
int write_access)
|
||||
#else
|
||||
/* Return type changed in 2.3.23 */
|
||||
struct page *DRM(vm_sg_nopage)(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
int write_access)
|
||||
#endif
|
||||
{
|
||||
#if LINUX_VERSION_CODE >= 0x020300
|
||||
drm_map_t *map = (drm_map_t *)vma->vm_private_data;
|
||||
#else
|
||||
drm_map_t *map = (drm_map_t *)vma->vm_pte;
|
||||
#endif
|
||||
drm_file_t *priv = vma->vm_file->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_sg_mem_t *entry = dev->sg;
|
||||
unsigned long offset;
|
||||
unsigned long map_offset;
|
||||
unsigned long page_offset;
|
||||
struct page *page;
|
||||
|
||||
if (!entry) return NOPAGE_SIGBUS; /* Error */
|
||||
if (address > vma->vm_end) return NOPAGE_SIGBUS; /* Disallow mremap */
|
||||
if (!entry->pagelist) return NOPAGE_OOM ; /* Nothing allocated */
|
||||
|
||||
|
||||
offset = address - vma->vm_start;
|
||||
map_offset = map->offset - dev->sg->handle;
|
||||
page_offset = (offset >> PAGE_SHIFT) + (map_offset >> PAGE_SHIFT);
|
||||
page = entry->pagelist[page_offset];
|
||||
atomic_inc(&page->count); /* Dec. by kernel */
|
||||
|
||||
#if LINUX_VERSION_CODE < 0x020317
|
||||
return (unsigned long)virt_to_phys(page->virtual);
|
||||
#else
|
||||
return page;
|
||||
#endif
|
||||
}
|
||||
|
||||
void DRM(vm_open)(struct vm_area_struct *vma)
|
||||
{
|
||||
drm_file_t *priv = vma->vm_file->private_data;
|
||||
|
@ -371,7 +322,6 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
drm_device_t *dev = priv->dev;
|
||||
drm_map_t *map = NULL;
|
||||
drm_map_list_t *r_list;
|
||||
unsigned long offset = 0;
|
||||
struct list_head *list;
|
||||
|
||||
DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n",
|
||||
|
@ -424,26 +374,19 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
}
|
||||
#elif defined(__ia64__)
|
||||
if (map->type != _DRM_AGP)
|
||||
vma->vm_page_prot =
|
||||
pgprot_writecombine(vma->vm_page_prot);
|
||||
#elif defined(__powerpc__)
|
||||
pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED;
|
||||
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
|
||||
#endif
|
||||
vma->vm_flags |= VM_IO; /* not in core dump */
|
||||
}
|
||||
#ifdef __alpha__
|
||||
offset = dev->hose->dense_mem_base -
|
||||
dev->hose->mem_space->start;
|
||||
#endif
|
||||
if (remap_page_range(vma->vm_start,
|
||||
VM_OFFSET(vma) + offset,
|
||||
VM_OFFSET(vma),
|
||||
vma->vm_end - vma->vm_start,
|
||||
vma->vm_page_prot))
|
||||
return -EAGAIN;
|
||||
DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx,"
|
||||
" offset = 0x%lx\n",
|
||||
map->type,
|
||||
vma->vm_start, vma->vm_end, VM_OFFSET(vma) + offset);
|
||||
vma->vm_start, vma->vm_end, VM_OFFSET(vma));
|
||||
vma->vm_ops = &drm_vm_ops;
|
||||
break;
|
||||
case _DRM_SHM:
|
||||
|
@ -457,15 +400,6 @@ int DRM(mmap)(struct file *filp, struct vm_area_struct *vma)
|
|||
DRM_KERNEL advisory is supported. */
|
||||
vma->vm_flags |= VM_LOCKED;
|
||||
break;
|
||||
case _DRM_SCATTER_GATHER:
|
||||
vma->vm_ops = &drm_vm_sg_ops;
|
||||
#if LINUX_VERSION_CODE >= 0x020300
|
||||
vma->vm_private_data = (void *)map;
|
||||
#else
|
||||
vma->vm_pte = (unsigned long)map;
|
||||
#endif
|
||||
vma->vm_flags |= VM_LOCKED;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL; /* This should never happen. */
|
||||
}
|
||||
|
|
|
@ -37,11 +37,9 @@
|
|||
/* General customization:
|
||||
*/
|
||||
#define __HAVE_AGP 1
|
||||
#define __MUST_HAVE_AGP 0
|
||||
#define __MUST_HAVE_AGP 1
|
||||
#define __HAVE_MTRR 1
|
||||
#define __HAVE_CTX_BITMAP 1
|
||||
#define __HAVE_SG 1
|
||||
#define __HAVE_PCI_DMA 1
|
||||
|
||||
/* Driver customization:
|
||||
*/
|
||||
|
|
|
@ -37,11 +37,9 @@
|
|||
/* General customization:
|
||||
*/
|
||||
#define __HAVE_AGP 1
|
||||
#define __MUST_HAVE_AGP 0
|
||||
#define __MUST_HAVE_AGP 1
|
||||
#define __HAVE_MTRR 1
|
||||
#define __HAVE_CTX_BITMAP 1
|
||||
#define __HAVE_SG 1
|
||||
#define __HAVE_PCI_DMA 1
|
||||
|
||||
/* Driver customization:
|
||||
*/
|
||||
|
|
Loading…
Reference in New Issue