intel: Only align Y-tiling pitch to the Y tile width.
Fixes piglit depth-tex-modes on gen4.main
parent
3e21e3ba00
commit
1d4d1e6b13
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@ -254,12 +254,17 @@ static unsigned long
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drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
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unsigned long pitch, uint32_t tiling_mode)
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{
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unsigned long tile_width = 512;
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unsigned long tile_width;
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unsigned long i;
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if (tiling_mode == I915_TILING_NONE)
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return pitch;
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if (tiling_mode == I915_TILING_X)
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tile_width = 512;
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else
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tile_width = 128;
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/* 965 is flexible */
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if (bufmgr_gem->gen >= 4)
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return ROUND_UP_TO(pitch, tile_width);
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