nouveau: stub superioctl
parent
793cd1dad5
commit
2370ded79b
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@ -23,7 +23,7 @@ i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
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i915_buffer.o i915_compat.o
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nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
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nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
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nouveau_sgdma.o nouveau_dma.o nouveau_buffer.o nouveau_fence.o \
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nouveau_sgdma.o nouveau_dma.o nouveau_bo.o nouveau_fence.o \
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nv04_timer.o \
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nv04_mc.o nv40_mc.o nv50_mc.o \
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nv04_fb.o nv10_fb.o nv40_fb.o \
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@ -254,3 +254,12 @@ struct drm_bo_driver nouveau_bo_driver = {
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.move = nouveau_bo_move,
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.ttm_cache_flush= nouveau_bo_flush_ttm
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};
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int
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nouveau_bo_validate(struct drm_device *dev, void *data,
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struct drm_file *file_priv)
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{
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DRM_ERROR("unimplemented\n");
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return -EINVAL;
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}
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@ -25,7 +25,7 @@
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#ifndef __NOUVEAU_DRM_H__
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#define __NOUVEAU_DRM_H__
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#define NOUVEAU_DRM_HEADER_PATCHLEVEL 10
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#define NOUVEAU_DRM_HEADER_PATCHLEVEL 11
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struct drm_nouveau_channel_alloc {
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uint32_t fb_ctxdma_handle;
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@ -117,6 +117,9 @@ struct drm_nouveau_setparam {
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uint64_t value;
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};
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struct drm_nouveau_bo_validate {
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};
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enum nouveau_card_type {
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NV_UNKNOWN =0,
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NV_04 =4,
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@ -156,5 +159,6 @@ struct drm_nouveau_sarea {
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#define DRM_NOUVEAU_GPUOBJ_FREE 0x07
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#define DRM_NOUVEAU_MEM_ALLOC 0x08
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#define DRM_NOUVEAU_MEM_FREE 0x09
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#define DRM_NOUVEAU_BO_VALIDATE 0x0a
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#endif /* __NOUVEAU_DRM_H__ */
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@ -34,7 +34,7 @@
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 10
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#define DRIVER_PATCHLEVEL 11
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#define NOUVEAU_FAMILY 0x0000FFFF
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#define NOUVEAU_FLAGS 0xFFFF0000
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@ -559,8 +559,10 @@ extern void nv04_timer_takedown(struct drm_device *);
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extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg);
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/* nouveau_buffer.c */
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/* nouveau_bo.c */
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extern struct drm_bo_driver nouveau_bo_driver;
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extern int nouveau_bo_validate(struct drm_device *, void *data,
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struct drm_file *);
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/* nouveau_fence.c */
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extern struct drm_fence_driver nouveau_fence_driver;
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@ -565,6 +565,7 @@ struct drm_ioctl_desc nouveau_ioctls[] = {
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DRM_IOCTL_DEF(DRM_NOUVEAU_GPUOBJ_FREE, nouveau_ioctl_gpuobj_free, DRM_AUTH),
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DRM_IOCTL_DEF(DRM_NOUVEAU_MEM_ALLOC, nouveau_ioctl_mem_alloc, DRM_AUTH),
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DRM_IOCTL_DEF(DRM_NOUVEAU_MEM_FREE, nouveau_ioctl_mem_free, DRM_AUTH),
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DRM_IOCTL_DEF(DRM_NOUVEAU_BO_VALIDATE, nouveau_bo_validate, DRM_AUTH),
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};
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int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);
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@ -278,7 +278,7 @@ nouveau_card_init(struct drm_device *dev)
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if (dev_priv->init_state == NOUVEAU_CARD_INIT_DONE)
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return 0;
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dev_priv->ttm = 0;
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dev_priv->ttm = 1;
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/* Map any PCI resources we need on the card */
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ret = nouveau_init_card_mappings(dev);
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