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amdgpu: support non-page-aligned userptr 

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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monk.liu 2015-04-23 13:18:59 +08:00 committed by Alex Deucher
parent 3c5fe78801
commit 2f2c8ac0f4
2 changed files with 14 additions and 1 deletions
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12
amdgpu/amdgpu_bo.c
View File

@ -587,9 +587,17 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
struct amdgpu_bo *bo; struct amdgpu_bo *bo;
struct drm_amdgpu_gem_userptr args; struct drm_amdgpu_gem_userptr args;
union drm_amdgpu_gem_va va; union drm_amdgpu_gem_va va;
uintptr_t cpu0;
uint32_t ps, off;
memset(&args, 0, sizeof(args)); memset(&args, 0, sizeof(args));
args.addr = (uint64_t)cpu; ps = getpagesize();
cpu0 = ROUND_DOWN((uintptr_t)cpu, ps);
off = (uintptr_t)cpu - cpu0;
size = ROUND_UP(size + off, ps);
args.addr = cpu0;
args.flags = AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_REGISTER; args.flags = AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_REGISTER;
args.size = size; args.size = size;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR, r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR,
@ -622,5 +630,7 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
(void*)(uintptr_t)bo->virtual_mc_base_address, bo); (void*)(uintptr_t)bo->virtual_mc_base_address, bo);
info->buf_handle = bo; info->buf_handle = bo;
info->virtual_mc_base_address = bo->virtual_mc_base_address; info->virtual_mc_base_address = bo->virtual_mc_base_address;
info->virtual_mc_base_address += off;
return r; return r;
} }

3
amdgpu/amdgpu_internal.h
View File

@ -35,6 +35,9 @@
#include "util_double_list.h" #include "util_double_list.h"
#define AMDGPU_CS_MAX_RINGS 8 #define AMDGPU_CS_MAX_RINGS 8
/* do not use below macro if b is not power of 2 aligned value */
#define ROUND_DOWN(a,b) ((a) & (~((b)-1)))
#define ROUND_UP(a,b) (((a)+((b)-1)) & (~((b)-1)))
struct amdgpu_bo_va_hole { struct amdgpu_bo_va_hole {
struct list_head list; struct list_head list;