geemili
/
drm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Import Thomas' changes upto 2.4.3 to shared. Small tweak to install target.

main
Keith Whitwell 2005-01-11 10:59:01 +00:00
parent 9904319b95
commit ee57636763
7 changed files with 120 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
linux-2.6/Makefile
View File

@ -111,7 +111,7 @@ VIAHEADERS = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
via_mm.c via_dma.c via_verifier.c
via_mm.c via_dma.c via_verifier.c via_verifier.h
MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
$(DRMTEMPLATES)
MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \
@ -279,7 +279,7 @@ clean cleandir:
$(MODULE_LIST)::
make DRM_MODULES=$@ modules
install:
install: modules
cp -p $(MODULE_LIST:.o=.ko) /lib/modules/$(RUNNING_REL)/kernel/drivers/char/drm

2
linux/Makefile
View File

@ -99,7 +99,7 @@ VIAHEADERS = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
via_mm.c via_dma.c via_verifier.c
via_mm.c via_dma.c via_verifier.c via_verifier.h
MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
$(DRMTEMPLATES)
MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \

4
shared/via.h
View File

@ -30,11 +30,11 @@
#define DRIVER_NAME "via"
#define DRIVER_DESC "VIA Unichrome"
#define DRIVER_DATE "20050106"
#define DRIVER_DATE "20050107"
#define DRIVER_MAJOR 2
#define DRIVER_MINOR 4
#define DRIVER_PATCHLEVEL 1
#define DRIVER_PATCHLEVEL 3
#define DRIVER_IOCTLS \
[DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \

4
shared/via_dma.c
View File

@ -282,7 +282,7 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
*/
if ((ret = via_verify_command_stream((uint32_t *)pci_buf, cmd->size, dev))) {
if ((ret = via_verify_command_stream((uint32_t *)pci_buf, cmd->size, dev, 1))) {
return ret;
}
@ -348,7 +348,7 @@ static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf,
int ret;
int check_2d_cmd = 1;
if ((ret = via_verify_command_stream(regbuf, size, dev)))
if ((ret = via_verify_command_stream(regbuf, size, dev, 0)))
return ret;
while (regbuf != regend) {

4
shared/via_drv.h
View File

@ -25,6 +25,7 @@
#define _VIA_DRV_H_
#include "via_drm.h"
#include "via_verifier.h"
typedef struct drm_via_ring_buffer {
drm_map_t map;
@ -49,6 +50,7 @@ typedef struct drm_via_private {
struct timeval last_vblank;
int last_vblank_valid;
unsigned usec_per_vblank;
drm_via_state_t hc_state;
} drm_via_private_t;
/* VIA MMIO register access */
@ -77,8 +79,6 @@ extern int via_dma_cleanup(drm_device_t * dev);
extern int via_wait_idle(drm_via_private_t * dev_priv);
extern int via_driver_dma_quiescent(drm_device_t * dev);
extern void via_init_command_verifier( void );
extern int via_verify_command_stream(const uint32_t * buf, unsigned int size,
drm_device_t *dev);
extern int via_fb_free(drm_via_mem_t * mem);
extern int via_fb_alloc(drm_via_mem_t * mem);

105
shared/via_verifier.c
View File

@ -31,6 +31,10 @@
#include "via.h"
#include "via_3d_reg.h"
#include "drmP.h"
#include "drm.h"
#include "via_drm.h"
#include "via_verifier.h"
#include "via_drv.h"
typedef enum{
state_command,
@ -41,13 +45,6 @@ typedef enum{
state_error
} verifier_state_t;
typedef enum{
no_sequence = 0,
z_address,
dest_address,
tex_address
}sequence_t;
typedef enum{
no_check = 0,
@ -86,7 +83,7 @@ typedef enum{
* that does not include any part of the address.
*/
static sequence_t seqs[] = {
static drm_via_sequence_t seqs[] = {
no_sequence,
no_sequence,
no_sequence,
@ -246,27 +243,6 @@ static hazard_t table3[256];
typedef struct{
unsigned texture;
uint32_t z_addr;
uint32_t d_addr;
uint32_t t_addr[2][10];
uint32_t pitch[2][10];
uint32_t height[2][10];
uint32_t tex_level_lo[2];
uint32_t tex_level_hi[2];
uint32_t tex_palette_size[2];
sequence_t unfinished;
int agp_texture;
int multitex;
drm_device_t *dev;
drm_map_t *map_cache;
uint32_t vertex_count;
} sequence_context_t;
static sequence_context_t hc_sequence;
static __inline__ int
eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
{
@ -284,7 +260,7 @@ eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
*/
static __inline__ drm_map_t *
via_drm_lookup_agp_map (sequence_context_t *seq, unsigned long offset, unsigned long size,
via_drm_lookup_agp_map (drm_via_state_t *seq, unsigned long offset, unsigned long size,
drm_device_t *dev)
{
struct list_head *list;
@ -321,7 +297,7 @@ via_drm_lookup_agp_map (sequence_context_t *seq, unsigned long offset, unsigned
static __inline__ int
finish_current_sequence(sequence_context_t *cur_seq)
finish_current_sequence(drm_via_state_t *cur_seq)
{
switch(cur_seq->unfinished) {
case z_address:
@ -366,7 +342,7 @@ finish_current_sequence(sequence_context_t *cur_seq)
}
static __inline__ int
investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
investigate_hazard( uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
{
register uint32_t tmp, *tmp_addr;
@ -519,7 +495,7 @@ investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
static __inline__ int
via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
sequence_context_t *cur_seq)
drm_via_state_t *cur_seq)
{
uint32_t a_fire, bcmd , dw_count;
int ret = 0;
@ -547,7 +523,7 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
* How many dwords per vertex ?
*/
if ((bcmd & (0xF << 11)) == 0) {
if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) {
DRM_ERROR("Illegal B command vertex data for AGP.\n");
ret = 1;
break;
@ -564,12 +540,6 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
if (bcmd & (1 << 14)) dw_count++;
while(buf < buf_end) {
if (*buf == HALCYON_HEADER2) {
DRM_ERROR("Missing Vertex Fire command or verifier "
"lost sync.\n");
ret = 1;
break;
}
if (*buf == a_fire) {
have_fire = 1;
buf++;
@ -577,6 +547,14 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
buf++;
break;
}
if ((*buf == HALCYON_HEADER2) ||
((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) {
DRM_ERROR("Missing Vertex Fire command, "
"Stray Vertex Fire command or verifier "
"lost sync.\n");
ret = 1;
break;
}
if ((ret = eat_words(&buf, buf_end, dw_count)))
break;
}
@ -586,6 +564,11 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
ret = 1;
break;
}
if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) {
DRM_ERROR("AGP Primitive list end misaligned.\n");
ret = 1;
break;
}
}
*buffer = buf;
return ret;
@ -596,7 +579,8 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
static __inline__ verifier_state_t
via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
via_check_header2( uint32_t const **buffer, const uint32_t *buf_end,
drm_via_state_t *hc_state)
{
uint32_t cmd;
int hz_mode;
@ -614,7 +598,7 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
switch(cmd) {
case HC_ParaType_CmdVdata:
if (via_check_prim_list(&buf, buf_end, &hc_sequence ))
if (via_check_prim_list(&buf, buf_end, hc_state ))
return state_error;
*buffer = buf;
return state_command;
@ -622,11 +606,11 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
hz_table = table1;
break;
case HC_ParaType_Tex:
hc_sequence.texture = 0;
hc_state->texture = 0;
hz_table = table2;
break;
case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)):
hc_sequence.texture = 1;
hc_state->texture = 1;
hz_table = table2;
break;
case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)):
@ -668,19 +652,19 @@ via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
while(buf < buf_end) {
cmd = *buf++;
if ((hz = hz_table[cmd >> 24])) {
if ((hz_mode = investigate_hazard(cmd, hz, &hc_sequence))) {
if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
if (hz_mode == 1) {
buf--;
break;
}
return state_error;
}
} else if (hc_sequence.unfinished &&
finish_current_sequence(&hc_sequence)) {
} else if (hc_state->unfinished &&
finish_current_sequence(hc_state)) {
return state_error;
}
}
if (hc_sequence.unfinished && finish_current_sequence(&hc_sequence)) {
if (hc_state->unfinished && finish_current_sequence(hc_state)) {
return state_error;
}
*buffer = buf;
@ -827,22 +811,29 @@ via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end )
int
via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev)
via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev,
int agp)
{
drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
drm_via_state_t *hc_state = &dev_priv->hc_state;
drm_via_state_t saved_state = *hc_state;
uint32_t cmd;
const uint32_t *buf_end = buf + ( size >> 2 );
verifier_state_t state = state_command;
hc_sequence.dev = dev;
hc_sequence.unfinished = no_sequence;
hc_sequence.map_cache = NULL;
hc_state->dev = dev;
hc_state->unfinished = no_sequence;
hc_state->map_cache = NULL;
hc_state->agp = agp;
hc_state->buf_start = buf;
while (buf < buf_end) {
switch (state) {
case state_header2:
state = via_check_header2( &buf, buf_end );
state = via_check_header2( &buf, buf_end, hc_state );
break;
case state_header1:
state = via_check_header1( &buf, buf_end );
@ -870,10 +861,15 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t
break;
case state_error:
default:
*hc_state = saved_state;
return DRM_ERR(EINVAL);
}
}
return (state == state_error) ? DRM_ERR(EINVAL) : 0;
if (state == state_error) {
*hc_state = saved_state;
return DRM_ERR(EINVAL);
}
return 0;
}
static void
@ -893,7 +889,6 @@ setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
void
via_init_command_verifier( void )
{
hc_sequence.texture = 0;
setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t));
setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t));
setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t));

61
shared/via_verifier.h Normal file
View File

@ -0,0 +1,61 @@
/*
* Copyright 2004 The Unichrome Project. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sub license,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Author: Thomas Hellström 2004.
*/
#ifndef _VIA_VERIFIER_H_
#define _VIA_VERIFIER_H_
typedef enum{
no_sequence = 0,
z_address,
dest_address,
tex_address
}drm_via_sequence_t;
typedef struct{
unsigned texture;
uint32_t z_addr;
uint32_t d_addr;
uint32_t t_addr[2][10];
uint32_t pitch[2][10];
uint32_t height[2][10];
uint32_t tex_level_lo[2];
uint32_t tex_level_hi[2];
uint32_t tex_palette_size[2];
drm_via_sequence_t unfinished;
int agp_texture;
int multitex;
drm_device_t *dev;
drm_map_t *map_cache;
uint32_t vertex_count;
int agp;
const uint32_t *buf_start;
} drm_via_state_t;
extern int via_verify_command_stream(const uint32_t * buf, unsigned int size,
drm_device_t *dev, int agp);
#endif