Import Thomas' changes upto 2.4.3 to shared. Small tweak to install target.
parent
9904319b95
commit
ee57636763
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@ -111,7 +111,7 @@ VIAHEADERS = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
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via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
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VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
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via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
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via_mm.c via_dma.c via_verifier.c
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via_mm.c via_dma.c via_verifier.c via_verifier.h
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MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
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MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
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$(DRMTEMPLATES)
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$(DRMTEMPLATES)
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MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \
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MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \
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@ -279,7 +279,7 @@ clean cleandir:
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$(MODULE_LIST)::
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$(MODULE_LIST)::
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make DRM_MODULES=$@ modules
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make DRM_MODULES=$@ modules
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install:
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install: modules
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cp -p $(MODULE_LIST:.o=.ko) /lib/modules/$(RUNNING_REL)/kernel/drivers/char/drm
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cp -p $(MODULE_LIST:.o=.ko) /lib/modules/$(RUNNING_REL)/kernel/drivers/char/drm
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@ -99,7 +99,7 @@ VIAHEADERS = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
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via_3d_reg.h $(DRMHEADERS) $(DRMTEMPLATES)
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VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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VIASHARED = via_drm.h via_drv.h via.h via_mm.h via_ds.h \
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via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
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via_3d_reg.h via_drv.c via_ds.c via_irq.c via_map.c \
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via_mm.c via_dma.c via_verifier.c
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via_mm.c via_dma.c via_verifier.c via_verifier.h
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MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
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MACH64HEADERS = mach64.h mach64_drv.h mach64_drm.h $(DRMHEADERS) \
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$(DRMTEMPLATES)
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$(DRMTEMPLATES)
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MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \
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MACH64SHARED = mach64.h mach64_drv.h mach64_drm.h mach64_dma.c \
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@ -30,11 +30,11 @@
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#define DRIVER_NAME "via"
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#define DRIVER_NAME "via"
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#define DRIVER_DESC "VIA Unichrome"
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#define DRIVER_DESC "VIA Unichrome"
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#define DRIVER_DATE "20050106"
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#define DRIVER_DATE "20050107"
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#define DRIVER_MAJOR 2
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#define DRIVER_MAJOR 2
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#define DRIVER_MINOR 4
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#define DRIVER_MINOR 4
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#define DRIVER_PATCHLEVEL 1
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#define DRIVER_PATCHLEVEL 3
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#define DRIVER_IOCTLS \
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#define DRIVER_IOCTLS \
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[DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \
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[DRM_IOCTL_NR(DRM_IOCTL_VIA_ALLOCMEM)] = { via_mem_alloc, 1, 0 }, \
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@ -282,7 +282,7 @@ static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
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*/
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*/
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if ((ret = via_verify_command_stream((uint32_t *)pci_buf, cmd->size, dev))) {
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if ((ret = via_verify_command_stream((uint32_t *)pci_buf, cmd->size, dev, 1))) {
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return ret;
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return ret;
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}
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}
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@ -348,7 +348,7 @@ static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf,
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int ret;
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int ret;
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int check_2d_cmd = 1;
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int check_2d_cmd = 1;
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if ((ret = via_verify_command_stream(regbuf, size, dev)))
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if ((ret = via_verify_command_stream(regbuf, size, dev, 0)))
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return ret;
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return ret;
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while (regbuf != regend) {
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while (regbuf != regend) {
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@ -25,6 +25,7 @@
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#define _VIA_DRV_H_
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#define _VIA_DRV_H_
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#include "via_drm.h"
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#include "via_drm.h"
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#include "via_verifier.h"
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typedef struct drm_via_ring_buffer {
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typedef struct drm_via_ring_buffer {
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drm_map_t map;
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drm_map_t map;
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@ -49,6 +50,7 @@ typedef struct drm_via_private {
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struct timeval last_vblank;
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struct timeval last_vblank;
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int last_vblank_valid;
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int last_vblank_valid;
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unsigned usec_per_vblank;
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unsigned usec_per_vblank;
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drm_via_state_t hc_state;
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} drm_via_private_t;
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} drm_via_private_t;
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/* VIA MMIO register access */
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/* VIA MMIO register access */
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@ -77,8 +79,6 @@ extern int via_dma_cleanup(drm_device_t * dev);
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extern int via_wait_idle(drm_via_private_t * dev_priv);
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extern int via_wait_idle(drm_via_private_t * dev_priv);
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extern int via_driver_dma_quiescent(drm_device_t * dev);
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extern int via_driver_dma_quiescent(drm_device_t * dev);
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extern void via_init_command_verifier( void );
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extern void via_init_command_verifier( void );
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extern int via_verify_command_stream(const uint32_t * buf, unsigned int size,
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drm_device_t *dev);
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extern int via_fb_free(drm_via_mem_t * mem);
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extern int via_fb_free(drm_via_mem_t * mem);
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extern int via_fb_alloc(drm_via_mem_t * mem);
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extern int via_fb_alloc(drm_via_mem_t * mem);
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@ -31,6 +31,10 @@
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#include "via.h"
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#include "via.h"
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#include "via_3d_reg.h"
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#include "via_3d_reg.h"
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#include "drmP.h"
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#include "drmP.h"
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#include "drm.h"
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#include "via_drm.h"
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#include "via_verifier.h"
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#include "via_drv.h"
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typedef enum{
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typedef enum{
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state_command,
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state_command,
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@ -41,13 +45,6 @@ typedef enum{
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state_error
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state_error
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} verifier_state_t;
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} verifier_state_t;
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typedef enum{
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no_sequence = 0,
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z_address,
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dest_address,
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tex_address
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}sequence_t;
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typedef enum{
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typedef enum{
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no_check = 0,
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no_check = 0,
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@ -86,7 +83,7 @@ typedef enum{
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* that does not include any part of the address.
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* that does not include any part of the address.
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*/
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*/
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static sequence_t seqs[] = {
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static drm_via_sequence_t seqs[] = {
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no_sequence,
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no_sequence,
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no_sequence,
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no_sequence,
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no_sequence,
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no_sequence,
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@ -246,27 +243,6 @@ static hazard_t table3[256];
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typedef struct{
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unsigned texture;
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uint32_t z_addr;
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uint32_t d_addr;
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uint32_t t_addr[2][10];
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uint32_t pitch[2][10];
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uint32_t height[2][10];
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uint32_t tex_level_lo[2];
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uint32_t tex_level_hi[2];
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uint32_t tex_palette_size[2];
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sequence_t unfinished;
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int agp_texture;
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int multitex;
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drm_device_t *dev;
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drm_map_t *map_cache;
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uint32_t vertex_count;
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} sequence_context_t;
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static sequence_context_t hc_sequence;
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static __inline__ int
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static __inline__ int
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eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
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eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
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{
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{
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@ -284,7 +260,7 @@ eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
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*/
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*/
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static __inline__ drm_map_t *
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static __inline__ drm_map_t *
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via_drm_lookup_agp_map (sequence_context_t *seq, unsigned long offset, unsigned long size,
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via_drm_lookup_agp_map (drm_via_state_t *seq, unsigned long offset, unsigned long size,
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drm_device_t *dev)
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drm_device_t *dev)
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{
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{
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struct list_head *list;
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struct list_head *list;
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@ -321,7 +297,7 @@ via_drm_lookup_agp_map (sequence_context_t *seq, unsigned long offset, unsigned
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static __inline__ int
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static __inline__ int
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finish_current_sequence(sequence_context_t *cur_seq)
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finish_current_sequence(drm_via_state_t *cur_seq)
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{
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{
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switch(cur_seq->unfinished) {
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switch(cur_seq->unfinished) {
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case z_address:
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case z_address:
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@ -366,7 +342,7 @@ finish_current_sequence(sequence_context_t *cur_seq)
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}
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}
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static __inline__ int
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static __inline__ int
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investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
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investigate_hazard( uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
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{
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{
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register uint32_t tmp, *tmp_addr;
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register uint32_t tmp, *tmp_addr;
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@ -519,7 +495,7 @@ investigate_hazard( uint32_t cmd, hazard_t hz, sequence_context_t *cur_seq)
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static __inline__ int
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static __inline__ int
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via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
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via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
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sequence_context_t *cur_seq)
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drm_via_state_t *cur_seq)
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{
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{
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uint32_t a_fire, bcmd , dw_count;
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uint32_t a_fire, bcmd , dw_count;
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int ret = 0;
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int ret = 0;
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@ -547,7 +523,7 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
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* How many dwords per vertex ?
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* How many dwords per vertex ?
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*/
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*/
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if ((bcmd & (0xF << 11)) == 0) {
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if (cur_seq->agp && ((bcmd & (0xF << 11)) == 0)) {
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DRM_ERROR("Illegal B command vertex data for AGP.\n");
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DRM_ERROR("Illegal B command vertex data for AGP.\n");
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ret = 1;
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ret = 1;
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break;
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break;
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@ -564,12 +540,6 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t *buf_end,
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if (bcmd & (1 << 14)) dw_count++;
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if (bcmd & (1 << 14)) dw_count++;
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while(buf < buf_end) {
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while(buf < buf_end) {
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if (*buf == HALCYON_HEADER2) {
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DRM_ERROR("Missing Vertex Fire command or verifier "
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"lost sync.\n");
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ret = 1;
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break;
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}
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if (*buf == a_fire) {
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if (*buf == a_fire) {
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have_fire = 1;
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have_fire = 1;
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buf++;
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buf++;
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buf++;
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buf++;
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break;
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break;
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}
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}
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if ((*buf == HALCYON_HEADER2) ||
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((*buf & HALCYON_FIREMASK) == HALCYON_FIRECMD)) {
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DRM_ERROR("Missing Vertex Fire command, "
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"Stray Vertex Fire command or verifier "
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"lost sync.\n");
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ret = 1;
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break;
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}
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if ((ret = eat_words(&buf, buf_end, dw_count)))
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if ((ret = eat_words(&buf, buf_end, dw_count)))
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break;
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break;
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}
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}
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ret = 1;
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ret = 1;
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break;
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break;
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}
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}
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if (cur_seq->agp && ((buf - cur_seq->buf_start) & 0x01)) {
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DRM_ERROR("AGP Primitive list end misaligned.\n");
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ret = 1;
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break;
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}
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}
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}
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*buffer = buf;
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*buffer = buf;
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return ret;
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return ret;
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static __inline__ verifier_state_t
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static __inline__ verifier_state_t
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via_check_header2( uint32_t const **buffer, const uint32_t *buf_end )
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via_check_header2( uint32_t const **buffer, const uint32_t *buf_end,
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drm_via_state_t *hc_state)
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{
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{
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uint32_t cmd;
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uint32_t cmd;
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int hz_mode;
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int hz_mode;
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switch(cmd) {
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switch(cmd) {
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case HC_ParaType_CmdVdata:
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case HC_ParaType_CmdVdata:
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if (via_check_prim_list(&buf, buf_end, &hc_sequence ))
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if (via_check_prim_list(&buf, buf_end, hc_state ))
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return state_error;
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return state_error;
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*buffer = buf;
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*buffer = buf;
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return state_command;
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return state_command;
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hz_table = table1;
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hz_table = table1;
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break;
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break;
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case HC_ParaType_Tex:
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case HC_ParaType_Tex:
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hc_sequence.texture = 0;
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hc_state->texture = 0;
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hz_table = table2;
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hz_table = table2;
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break;
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break;
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case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)):
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case (HC_ParaType_Tex | (HC_SubType_Tex1 << 8)):
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hc_sequence.texture = 1;
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hc_state->texture = 1;
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hz_table = table2;
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hz_table = table2;
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break;
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break;
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case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)):
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case (HC_ParaType_Tex | (HC_SubType_TexGeneral << 8)):
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while(buf < buf_end) {
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while(buf < buf_end) {
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cmd = *buf++;
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cmd = *buf++;
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if ((hz = hz_table[cmd >> 24])) {
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if ((hz = hz_table[cmd >> 24])) {
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if ((hz_mode = investigate_hazard(cmd, hz, &hc_sequence))) {
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if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
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if (hz_mode == 1) {
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if (hz_mode == 1) {
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buf--;
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buf--;
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break;
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break;
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}
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}
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return state_error;
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return state_error;
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}
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}
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} else if (hc_sequence.unfinished &&
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} else if (hc_state->unfinished &&
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finish_current_sequence(&hc_sequence)) {
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finish_current_sequence(hc_state)) {
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return state_error;
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return state_error;
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}
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}
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}
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}
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if (hc_sequence.unfinished && finish_current_sequence(&hc_sequence)) {
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if (hc_state->unfinished && finish_current_sequence(hc_state)) {
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return state_error;
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return state_error;
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}
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}
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*buffer = buf;
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*buffer = buf;
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@ -827,22 +811,29 @@ via_check_vheader6( uint32_t const **buffer, const uint32_t *buf_end )
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int
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int
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via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev)
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via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t *dev,
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int agp)
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{
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{
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drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
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||||||
|
drm_via_state_t *hc_state = &dev_priv->hc_state;
|
||||||
|
drm_via_state_t saved_state = *hc_state;
|
||||||
uint32_t cmd;
|
uint32_t cmd;
|
||||||
const uint32_t *buf_end = buf + ( size >> 2 );
|
const uint32_t *buf_end = buf + ( size >> 2 );
|
||||||
verifier_state_t state = state_command;
|
verifier_state_t state = state_command;
|
||||||
|
|
||||||
hc_sequence.dev = dev;
|
|
||||||
hc_sequence.unfinished = no_sequence;
|
hc_state->dev = dev;
|
||||||
hc_sequence.map_cache = NULL;
|
hc_state->unfinished = no_sequence;
|
||||||
|
hc_state->map_cache = NULL;
|
||||||
|
hc_state->agp = agp;
|
||||||
|
hc_state->buf_start = buf;
|
||||||
|
|
||||||
while (buf < buf_end) {
|
while (buf < buf_end) {
|
||||||
|
|
||||||
switch (state) {
|
switch (state) {
|
||||||
case state_header2:
|
case state_header2:
|
||||||
state = via_check_header2( &buf, buf_end );
|
state = via_check_header2( &buf, buf_end, hc_state );
|
||||||
break;
|
break;
|
||||||
case state_header1:
|
case state_header1:
|
||||||
state = via_check_header1( &buf, buf_end );
|
state = via_check_header1( &buf, buf_end );
|
||||||
|
@ -870,10 +861,15 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size, drm_device_t
|
||||||
break;
|
break;
|
||||||
case state_error:
|
case state_error:
|
||||||
default:
|
default:
|
||||||
|
*hc_state = saved_state;
|
||||||
return DRM_ERR(EINVAL);
|
return DRM_ERR(EINVAL);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return (state == state_error) ? DRM_ERR(EINVAL) : 0;
|
if (state == state_error) {
|
||||||
|
*hc_state = saved_state;
|
||||||
|
return DRM_ERR(EINVAL);
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
@ -893,7 +889,6 @@ setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
|
||||||
void
|
void
|
||||||
via_init_command_verifier( void )
|
via_init_command_verifier( void )
|
||||||
{
|
{
|
||||||
hc_sequence.texture = 0;
|
|
||||||
setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t));
|
setup_hazard_table(init_table1, table1, sizeof(init_table1) / sizeof(hz_init_t));
|
||||||
setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t));
|
setup_hazard_table(init_table2, table2, sizeof(init_table2) / sizeof(hz_init_t));
|
||||||
setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t));
|
setup_hazard_table(init_table3, table3, sizeof(init_table3) / sizeof(hz_init_t));
|
||||||
|
|
|
@ -0,0 +1,61 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2004 The Unichrome Project. All Rights Reserved.
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||||
|
* copy of this software and associated documentation files (the "Software"),
|
||||||
|
* to deal in the Software without restriction, including without limitation
|
||||||
|
* the rights to use, copy, modify, merge, publish, distribute, sub license,
|
||||||
|
* and/or sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice (including the
|
||||||
|
* next paragraph) shall be included in all copies or substantial portions
|
||||||
|
* of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||||
|
* THE UNICHROME PROJECT, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||||
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||||
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||||
|
* DEALINGS IN THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* Author: Thomas Hellström 2004.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _VIA_VERIFIER_H_
|
||||||
|
#define _VIA_VERIFIER_H_
|
||||||
|
|
||||||
|
typedef enum{
|
||||||
|
no_sequence = 0,
|
||||||
|
z_address,
|
||||||
|
dest_address,
|
||||||
|
tex_address
|
||||||
|
}drm_via_sequence_t;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct{
|
||||||
|
unsigned texture;
|
||||||
|
uint32_t z_addr;
|
||||||
|
uint32_t d_addr;
|
||||||
|
uint32_t t_addr[2][10];
|
||||||
|
uint32_t pitch[2][10];
|
||||||
|
uint32_t height[2][10];
|
||||||
|
uint32_t tex_level_lo[2];
|
||||||
|
uint32_t tex_level_hi[2];
|
||||||
|
uint32_t tex_palette_size[2];
|
||||||
|
drm_via_sequence_t unfinished;
|
||||||
|
int agp_texture;
|
||||||
|
int multitex;
|
||||||
|
drm_device_t *dev;
|
||||||
|
drm_map_t *map_cache;
|
||||||
|
uint32_t vertex_count;
|
||||||
|
int agp;
|
||||||
|
const uint32_t *buf_start;
|
||||||
|
} drm_via_state_t;
|
||||||
|
|
||||||
|
extern int via_verify_command_stream(const uint32_t * buf, unsigned int size,
|
||||||
|
drm_device_t *dev, int agp);
|
||||||
|
|
||||||
|
#endif
|
Loading…
Reference in New Issue